gdb: Modify PC in case of invalid PC
Signed-off-by: Sachin Parekh <sachin.parekh@espressif.com>
This commit is contained in:
parent
e30185c166
commit
46d914ff45
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@ -142,6 +142,7 @@ SECTIONS
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. = 0x3C0;
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. = 0x3C0;
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KEEP(*(.DoubleExceptionVector.text));
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KEEP(*(.DoubleExceptionVector.text));
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. = 0x400;
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. = 0x400;
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_invalid_pc_placeholder = ABSOLUTE(.);
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*(.*Vector.literal)
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*(.*Vector.literal)
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*(.UserEnter.literal);
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*(.UserEnter.literal);
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@ -142,6 +142,7 @@ SECTIONS
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. = 0x3C0;
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. = 0x3C0;
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KEEP(*(.DoubleExceptionVector.text));
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KEEP(*(.DoubleExceptionVector.text));
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. = 0x400;
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. = 0x400;
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_invalid_pc_placeholder = ABSOLUTE(.);
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*(.*Vector.literal)
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*(.*Vector.literal)
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*(.UserEnter.literal);
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*(.UserEnter.literal);
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@ -24,6 +24,8 @@
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#warning "gdbstub_xtensa: revisit the implementation for Call0 ABI"
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#warning "gdbstub_xtensa: revisit the implementation for Call0 ABI"
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#endif
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#endif
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extern int _invalid_pc_placeholder;
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static void init_regfile(esp_gdbstub_gdb_regfile_t *dst)
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static void init_regfile(esp_gdbstub_gdb_regfile_t *dst)
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{
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{
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memset(dst, 0, sizeof(*dst));
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memset(dst, 0, sizeof(*dst));
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@ -47,7 +49,15 @@ void esp_gdbstub_frame_to_regfile(const esp_gdbstub_frame_t *frame, esp_gdbstub_
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{
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{
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init_regfile(dst);
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init_regfile(dst);
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const uint32_t *a_regs = (const uint32_t *) &frame->a0;
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const uint32_t *a_regs = (const uint32_t *) &frame->a0;
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dst->pc = (frame->pc & 0x3fffffffU) | 0x40000000U;
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if (!(esp_ptr_executable((frame->pc & 0x3fffffffU) | 0x40000000U) && (frame->pc & 0xC0000000U))) {
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/* Xtensa ABI sets the 2 MSBs of the PC according to the windowed call size
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* Incase the PC is invalid, GDB will fail to translate addresses to function names
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* Hence replacing the PC to a placeholder address in case of invalid PC
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*/
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dst->pc = (uint32_t)&_invalid_pc_placeholder;
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} else {
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dst->pc = (frame->pc & 0x3fffffffU) | 0x40000000U;
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}
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for (int i = 0; i < 16; i++) {
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for (int i = 0; i < 16; i++) {
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dst->a[i] = a_regs[i];
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dst->a[i] = a_regs[i];
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@ -73,7 +83,11 @@ static void solicited_frame_to_regfile(const XtSolFrame *frame, esp_gdbstub_gdb_
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{
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{
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init_regfile(dst);
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init_regfile(dst);
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const uint32_t *a_regs = (const uint32_t *) &frame->a0;
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const uint32_t *a_regs = (const uint32_t *) &frame->a0;
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dst->pc = (frame->pc & 0x3fffffffU) | 0x40000000U;
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if (!(esp_ptr_executable((frame->pc & 0x3fffffffU) | 0x40000000U) && (frame->pc & 0xC0000000U))) {
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dst->pc = (uint32_t)&_invalid_pc_placeholder;
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} else {
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dst->pc = (frame->pc & 0x3fffffffU) | 0x40000000U;
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}
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/* only 4 registers saved in the solicited frame */
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/* only 4 registers saved in the solicited frame */
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for (int i = 0; i < 4; i++) {
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for (int i = 0; i < 4; i++) {
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@ -51,7 +51,9 @@
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#include "panic_internal.h"
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#include "panic_internal.h"
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extern void esp_panic_handler(panic_info_t *);
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extern int _invalid_pc_placeholder;
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extern void esp_panic_handler(panic_info_t*);
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static wdt_hal_context_t wdt0_context = {.inst = WDT_MWDT0, .mwdt_dev = &TIMERG0};
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static wdt_hal_context_t wdt0_context = {.inst = WDT_MWDT0, .mwdt_dev = &TIMERG0};
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@ -512,6 +514,13 @@ static void panic_handler(XtExcFrame *frame, bool pseudo_excause)
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#endif
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#endif
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if (esp_cpu_in_ocd_debug_mode()) {
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if (esp_cpu_in_ocd_debug_mode()) {
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if (!(esp_ptr_executable(cpu_ll_pc_to_ptr(frame->pc)) && (frame->pc & 0xC0000000U))) {
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/* Xtensa ABI sets the 2 MSBs of the PC according to the windowed call size
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* Incase the PC is invalid, GDB will fail to translate addresses to function names
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* Hence replacing the PC to a placeholder address in case of invalid PC
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*/
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frame->pc = (uint32_t)&_invalid_pc_placeholder;
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}
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if (frame->exccause == PANIC_RSN_INTWDT_CPU0 ||
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if (frame->exccause == PANIC_RSN_INTWDT_CPU0 ||
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frame->exccause == PANIC_RSN_INTWDT_CPU1) {
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frame->exccause == PANIC_RSN_INTWDT_CPU1) {
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wdt_hal_write_protect_disable(&wdt0_context);
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wdt_hal_write_protect_disable(&wdt0_context);
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