Merge branch 'bugfix/improve_spi_timing_for_flash_v3.1' into 'release/v3.1'

bugfix(flash): improve spi cs timing settings for flash (backport v3.1)

See merge request espressif/esp-idf!5512

components/bootloader_support/include/bootloader_common.h

@@ -68,3 +68,11 @@ bool bootloader_common_erase_part_type_data(const char *list_erase, bool ota_dat
  * @return    Returns true if the list contains the label, false otherwise.
  */
 bool bootloader_common_label_search(const char *list, char *label);
+
+/**
+ * @brief Set the flash CS setup and hold time.
+ *
+ * CS setup time is recomemded to be 1.5T, and CS hold time is recommended to be 2.5T.
+ * cs_setup = 1, cs_setup_time = 0; cs_hold = 1, cs_hold_time = 1
+ */
+void bootloader_common_set_flash_cs_timing();

components/bootloader_support/src/bootloader_common.c

@@ -27,6 +27,7 @@
 #include "bootloader_flash.h"
 #include "bootloader_common.h"
 #include "soc/gpio_periph.h"
+#include "soc/spi_reg.h"
 
 static const char* TAG = "boot_comm";
 
@@ -145,3 +146,13 @@ bool bootloader_common_erase_part_type_data(const char *list_erase, bool ota_dat
 
     return ret;
 }
+
+void bootloader_common_set_flash_cs_timing()
+{
+    SET_PERI_REG_MASK(SPI_USER_REG(0), SPI_CS_HOLD_M | SPI_CS_SETUP_M);
+    SET_PERI_REG_BITS(SPI_CTRL2_REG(0), SPI_HOLD_TIME_V, 1, SPI_HOLD_TIME_S);
+    SET_PERI_REG_BITS(SPI_CTRL2_REG(0), SPI_SETUP_TIME_V, 0, SPI_SETUP_TIME_S);
+    SET_PERI_REG_MASK(SPI_USER_REG(1), SPI_CS_HOLD_M | SPI_CS_SETUP_M);
+    SET_PERI_REG_BITS(SPI_CTRL2_REG(1), SPI_HOLD_TIME_V, 1, SPI_HOLD_TIME_S);
+    SET_PERI_REG_BITS(SPI_CTRL2_REG(1), SPI_SETUP_TIME_V, 0, SPI_SETUP_TIME_S);
+}

components/bootloader_support/src/bootloader_init.c

@@ -47,6 +47,7 @@
 #include "bootloader_random.h"
 #include "bootloader_config.h"
 #include "bootloader_clock.h"
+#include "bootloader_common.h"
 
 #include "flash_qio_mode.h"
 
@@ -398,6 +399,9 @@ static void IRAM_ATTR flash_gpio_configure(const esp_image_header_t* pfhdr)
             #endif
         }
     }
+
+    // improve the flash cs timing.
+    bootloader_common_set_flash_cs_timing();
 }
 
 static void uart_console_configure(void)

components/esp32/cpu_start.c

@@ -70,6 +70,7 @@
 #include "esp_pm.h"
 #include "pm_impl.h"
 #include "trax.h"
+#include "bootloader_common.h"
 
 #define STRINGIFY(s) STRINGIFY2(s)
 #define STRINGIFY2(s) #s
@@ -160,6 +161,8 @@ void IRAM_ATTR call_start_cpu0()
         abort();
 #endif
     }
+# else  // If psram is uninitialized, we need to improve the flash cs timing.
+    bootloader_common_set_flash_cs_timing();
 #endif
 
     ESP_EARLY_LOGI(TAG, "Pro cpu up.");