Changes according to merge request

components/driver/include/driver/gpio.h

@@ -346,10 +346,6 @@ esp_err_t gpio_wakeup_disable(gpio_num_t gpio_num);
  * @param  fn  Interrupt handler function.
  * @param  intr_alloc_flags Flags used to allocate the interrupt. One or multiple (ORred)
  *            ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info.
- *
- *         @note
- *         Note that the handler function MUST be defined with attribution of "IRAM_ATTR".
- *
  * @param  arg  Parameter for handler function
  *
  * @return

components/driver/include/driver/ledc.h

@@ -262,8 +262,6 @@ esp_err_t ledc_set_fade(ledc_mode_t speed_mode, uint32_t channel, uint32_t duty,
  * @param  arg User-supplied argument passed to the handler function.
  * @param  intr_alloc_flags Flags used to allocate the interrupt. One or multiple (ORred)
  *            ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info.
- * @note
- *     Note that the handler function MUST be defined with attribution of "IRAM_ATTR".
  * @param   arg Parameter for handler function
  *
  * @return

components/driver/include/driver/pcnt.h

@@ -215,8 +215,6 @@ esp_err_t pcnt_get_event_value(pcnt_unit_t unit, pcnt_evt_type_t evt_type, int16
  *        The handler will be attached to the same CPU core that this function is running on.
  *
  * @param fn Interrupt handler function.
- *        @note
- *        Note that the handler function MUST be defined with attribution of "IRAM_ATTR".
  * @param arg Parameter for handler function
  * @param  intr_alloc_flags Flags used to allocate the interrupt. One or multiple (ORred)
  *            ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info.

components/driver/include/driver/rmt.h

@@ -755,7 +755,6 @@ esp_err_t rmt_get_ringbuf_handler(rmt_channel_t channel, RingbufHandle_t* buf_ha
  * ----------------EXAMPLE OF INTERRUPT HANDLER ---------------
  * @code{c}
  * #include "esp_attr.h"
- * //we should add 'IRAM_ATTR' attribution when we declare the isr function
  * void IRAM_ATTR rmt_isr_handler(void* arg)
  * {
  *    //read RMT interrupt status.

components/esp32/include/esp_heap_alloc_caps.h

@@ -14,18 +14,18 @@
 #ifndef HEAP_ALLOC_CAPS_H
 #define HEAP_ALLOC_CAPS_H
 
-#define MALLOC_CAP_EXEC				(1<<0)	//Memory must be able to run executable code
+#define MALLOC_CAP_EXEC             (1<<0)  //Memory must be able to run executable code
-#define MALLOC_CAP_32BIT			(1<<1)	//Memory must allow for aligned 32-bit data accesses
+#define MALLOC_CAP_32BIT            (1<<1)  //Memory must allow for aligned 32-bit data accesses
-#define MALLOC_CAP_8BIT				(1<<2)	//Memory must allow for 8/16/...-bit data accesses
+#define MALLOC_CAP_8BIT             (1<<2)  //Memory must allow for 8/16/...-bit data accesses
-#define MALLOC_CAP_DMA				(1<<3)	//Memory must be able to accessed by DMA
+#define MALLOC_CAP_DMA              (1<<3)  //Memory must be able to accessed by DMA
-#define MALLOC_CAP_PID2				(1<<4)	//Memory must be mapped to PID2 memory space
+#define MALLOC_CAP_PID2             (1<<4)  //Memory must be mapped to PID2 memory space
-#define MALLOC_CAP_PID3				(1<<5)	//Memory must be mapped to PID3 memory space
+#define MALLOC_CAP_PID3             (1<<5)  //Memory must be mapped to PID3 memory space
-#define MALLOC_CAP_PID4				(1<<6)	//Memory must be mapped to PID4 memory space
+#define MALLOC_CAP_PID4             (1<<6)  //Memory must be mapped to PID4 memory space
-#define MALLOC_CAP_PID5				(1<<7)	//Memory must be mapped to PID5 memory space
+#define MALLOC_CAP_PID5             (1<<7)  //Memory must be mapped to PID5 memory space
-#define MALLOC_CAP_PID6				(1<<8)	//Memory must be mapped to PID6 memory space
+#define MALLOC_CAP_PID6             (1<<8)  //Memory must be mapped to PID6 memory space
-#define MALLOC_CAP_PID7				(1<<9)	//Memory must be mapped to PID7 memory space
+#define MALLOC_CAP_PID7             (1<<9)  //Memory must be mapped to PID7 memory space
-#define MALLOC_CAP_SPISRAM			(1<<10)	//Memory must be in SPI SRAM
+#define MALLOC_CAP_SPISRAM          (1<<10) //Memory must be in SPI SRAM
-#define MALLOC_CAP_INVALID			(1<<31)	//Memory can't be used / list end marker
+#define MALLOC_CAP_INVALID          (1<<31) //Memory can't be used / list end marker
 
 
 void heap_alloc_caps_init();

components/esp32/intr_alloc.c

@@ -225,12 +225,13 @@ static vector_desc_t *find_desc_for_int(int intno, int cpu)
 
 //Returns a vector_desc entry for an intno/cpu.
 //Either returns a preexisting one or allocates a new one and inserts
-//it into the list.
+//it into the list. Returns NULL on malloc fail.
 static vector_desc_t *get_desc_for_int(int intno, int cpu) 
 {
     vector_desc_t *vd=find_desc_for_int(intno, cpu);
     if (vd==NULL) {
         vector_desc_t *newvd=malloc(sizeof(vector_desc_t));
+        if (newvd==NULL) return NULL;
         memset(newvd, 0, sizeof(vector_desc_t));
         newvd->intno_cpu=to_intno_cpu(intno, cpu);
         insert_vector_desc(newvd);
@@ -247,6 +248,10 @@ esp_err_t esp_intr_mark_shared(int intno, int cpu, bool is_int_ram)
 
     portENTER_CRITICAL(&spinlock);
     vector_desc_t *vd=get_desc_for_int(intno, cpu);
+    if (vd==NULL) {
+        portEXIT_CRITICAL(&spinlock);
+        return ESP_ERR_NO_MEM;
+    } 
     vd->flags=VECDESC_FL_SHARED;
     if (is_int_ram) vd->flags|=VECDESC_FL_INIRAM;
     portEXIT_CRITICAL(&spinlock);
@@ -261,6 +266,10 @@ esp_err_t esp_intr_reserve(int intno, int cpu)
 
     portENTER_CRITICAL(&spinlock);
     vector_desc_t *vd=get_desc_for_int(intno, cpu);
+    if (vd==NULL) {
+        portEXIT_CRITICAL(&spinlock);
+        return ESP_ERR_NO_MEM;
+    } 
     vd->flags=VECDESC_FL_RESERVED;
     portEXIT_CRITICAL(&spinlock);
 
@@ -301,7 +310,7 @@ static int get_free_int(int flags, int cpu, int force)
 
     ALCHLOG(TAG, "get_free_int: start looking. Current cpu: %d", cpu);
     //Iterate over the 32 possible interrupts
-    for (x=0; x!=31; x++) {
+    for (x=0; x<32; x++) {
         //Grab the vector_desc for this vector.
         vector_desc_t *vd=find_desc_for_int(x, cpu);
         if (vd==NULL) vd=&empty_vect_desc;
@@ -430,6 +439,7 @@ static void IRAM_ATTR shared_intr_isr(void *arg)
 esp_err_t esp_intr_alloc_intrstatus(int source, int flags, uint32_t intrstatusreg, uint32_t intrstatusmask, intr_handler_t handler, 
                                         void *arg, int_handle_t *ret_handle) 
 {
+    int_handle_data_t *ret=NULL;
     int force=-1;
     ESP_EARLY_LOGV(TAG, "esp_intr_alloc_intrstatus (cpu %d): checking args", xPortGetCoreID());
     //Shared interrupts should be level-triggered.
@@ -462,6 +472,12 @@ esp_err_t esp_intr_alloc_intrstatus(int source, int flags, uint32_t intrstatusre
     if (source==ETS_INTERNAL_SW1_INTR_SOURCE) force=ETS_INTERNAL_SW1_INTR_NO;
     if (source==ETS_INTERNAL_PROFILING_INTR_SOURCE) force=ETS_INTERNAL_PROFILING_INTR_NO;
 
+    //If we should return a handle, allocate it here.
+    if (ret_handle!=NULL) {
+        ret=malloc(sizeof(int_handle_data_t));
+        if (ret==NULL) return ESP_ERR_NO_MEM;
+    }
+
     portENTER_CRITICAL(&spinlock);
     int cpu=xPortGetCoreID();
     //See if we can find an interrupt that matches the flags.
@@ -469,15 +485,26 @@ esp_err_t esp_intr_alloc_intrstatus(int source, int flags, uint32_t intrstatusre
     if (intr==-1) {
         //None found. Bail out.
         portEXIT_CRITICAL(&spinlock);
+        free(ret);
         return ESP_ERR_NOT_FOUND;
     }
     //Get an int vector desc for int.
     vector_desc_t *vd=get_desc_for_int(intr, cpu);
+    if (vd==NULL) {
+        portEXIT_CRITICAL(&spinlock);
+        free(ret);
+        return ESP_ERR_NO_MEM;
+    }
 
     //Allocate that int!
     if (flags&ESP_INTR_FLAG_SHARED) {
         //Populate vector entry and add to linked list.
         shared_vector_desc_t *sh_vec=malloc(sizeof(shared_vector_desc_t));
+        if (sh_vec==NULL) {
+            portEXIT_CRITICAL(&spinlock);
+            free(ret);
+            return ESP_ERR_NO_MEM;
+        }
         memset(sh_vec, 0, sizeof(shared_vector_desc_t));
         sh_vec->statusreg=(uint32_t*)intrstatusreg;
         sh_vec->statusmask=intrstatusmask;
@@ -506,10 +533,8 @@ esp_err_t esp_intr_alloc_intrstatus(int source, int flags, uint32_t intrstatusre
     if (source>=0) {
         intr_matrix_set(cpu, source, intr);
     }
-    //If we should return a handle, allocate it here.
+    //Fill return handle if needed
     if (ret_handle!=NULL) {
-        int_handle_data_t *ret;
-        ret=malloc(sizeof(int_handle_data_t));
         ret->vector_desc=vd;
         ret->shared_vector_desc=vd->shared_vec_info;
         *ret_handle=ret;

components/mbedtls/Kconfig

@@ -61,14 +61,6 @@ config MBEDTLS_MPI_USE_INTERRUPT
         This allows other code to run on the CPU while an MPI operation is pending.
         Otherwise the CPU busy-waits.
 
-config MBEDTLS_MPI_INTERRUPT_NUM
-    int "MPI Interrupt number"
-    depends on MBEDTLS_MPI_USE_INTERRUPT
-    default 18
-    help
-        CPU interrupt number for MPI interrupt to connect to. Must be otherwise unused.
-        Eventually this assignment will be handled automatically at runtime.
-
 config MBEDTLS_HARDWARE_SHA
    bool "Enable hardware SHA acceleration"
    default y