Merge branch 'feature/print_halt_abort' into 'master'
panic handlers: Print the PC address where abort() was called, don't dump registers See merge request !338
This commit is contained in:
commit
2407faf6c6
4 changed files with 63 additions and 42 deletions
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@ -42,3 +42,15 @@ void IRAM_ATTR esp_cpu_unstall(int cpu_id)
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CLEAR_PERI_REG_MASK(RTC_CNTL_OPTIONS0_REG, RTC_CNTL_SW_STALL_PROCPU_C0_M);
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}
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}
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bool IRAM_ATTR esp_cpu_in_ocd_debug_mode()
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{
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#if CONFIG_ESP32_DEBUG_OCDAWARE
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int dcr;
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int reg=0x10200C; //DSRSET register
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asm("rer %0,%1":"=r"(dcr):"r"(reg));
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return (dcr&0x1);
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#else
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return false; // Always return false if "OCD aware" is disabled
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#endif
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}
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@ -104,4 +104,13 @@ void esp_cpu_stall(int cpu_id);
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*/
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void esp_cpu_unstall(int cpu_id);
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/**
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* @brief Returns true if a JTAG debugger is attached to CPU
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* OCD (on chip debug) port.
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*
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* @note If "Make exception and panic handlers JTAG/OCD aware"
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* is disabled, this function always returns false.
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*/
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bool esp_cpu_in_ocd_debug_mode();
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#endif
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@ -36,7 +36,7 @@
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/*
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Panic handlers; these get called when an unhandled exception occurs or the assembly-level
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task switching / interrupt code runs into an unrecoverable error. The default task stack
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overflow handler also is in here.
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overflow handler and abort handler are also in here.
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*/
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/*
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@ -95,15 +95,29 @@ inline static void panicPutHex(int a) { }
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inline static void panicPutDec(int a) { }
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#endif
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void __attribute__((weak)) vApplicationStackOverflowHook( TaskHandle_t xTask, signed char *pcTaskName )
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{
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panicPutStr("***ERROR*** A stack overflow in task ");
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panicPutStr((char *)pcTaskName);
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panicPutStr(" has been detected.\r\n");
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configASSERT(0);
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abort();
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}
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static bool abort_called;
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void abort()
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{
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#if !CONFIG_ESP32_PANIC_SILENT_REBOOT
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ets_printf("abort() was called at PC 0x%08x\n", (intptr_t)__builtin_return_address(0) - 3);
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#endif
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abort_called = true;
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while(1) {
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__asm__ ("break 0,0");
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*((int*) 0) = 0;
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}
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}
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static const char *edesc[] = {
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"IllegalInstruction", "Syscall", "InstructionFetchError", "LoadStoreError",
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"Level1Interrupt", "Alloca", "IntegerDivideByZero", "PCValue",
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@ -118,7 +132,7 @@ static const char *edesc[] = {
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};
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void commonErrorHandler(XtExcFrame *frame);
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static void commonErrorHandler(XtExcFrame *frame);
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//The fact that we've panic'ed probably means the other CPU is now running wild, possibly
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//messing up the serial output, so we stall it here.
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@ -127,19 +141,6 @@ static void haltOtherCore()
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esp_cpu_stall( xPortGetCoreID() == 0 ? 1 : 0 );
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}
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//Returns true when a debugger is attached using JTAG.
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static int inOCDMode()
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{
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#if CONFIG_ESP32_DEBUG_OCDAWARE
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int dcr;
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int reg = 0x10200C; //DSRSET register
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asm("rer %0,%1":"=r"(dcr):"r"(reg));
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return (dcr & 0x1);
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#else
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return 0; //Always return no debugger is attached.
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#endif
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}
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void panicHandler(XtExcFrame *frame)
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{
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int *regs = (int *)frame;
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@ -165,7 +166,7 @@ void panicHandler(XtExcFrame *frame)
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panicPutStr(reason);
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panicPutStr(")\r\n");
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if (inOCDMode()) {
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if (esp_cpu_in_ocd_debug_mode()) {
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asm("break.n 1");
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}
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commonErrorHandler(frame);
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@ -197,7 +198,7 @@ void xt_unhandled_exception(XtExcFrame *frame)
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}
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panicPutStr(" occurred on core ");
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panicPutDec(xPortGetCoreID());
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if (inOCDMode()) {
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if (esp_cpu_in_ocd_debug_mode()) {
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panicPutStr(" at pc=");
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panicPutHex(regs[1]);
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panicPutStr(". Setting bp and returning..\r\n");
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@ -255,6 +256,7 @@ static inline bool stackPointerIsSane(uint32_t sp)
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{
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return !(sp < 0x3ffae010 || sp > 0x3ffffff0 || ((sp & 0xf) != 0));
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}
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static void putEntry(uint32_t pc, uint32_t sp)
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{
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if (pc & 0x80000000) {
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@ -265,7 +267,8 @@ static void putEntry(uint32_t pc, uint32_t sp)
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panicPutStr(":0x");
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panicPutHex(sp);
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}
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void doBacktrace(XtExcFrame *frame)
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static void doBacktrace(XtExcFrame *frame)
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{
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uint32_t i = 0, pc = frame->pc, sp = frame->a1;
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panicPutStr("\nBacktrace:");
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@ -291,7 +294,7 @@ void doBacktrace(XtExcFrame *frame)
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We arrive here after a panic or unhandled exception, when no OCD is detected. Dump the registers to the
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serial port and either jump to the gdb stub, halt the CPU or reboot.
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*/
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void commonErrorHandler(XtExcFrame *frame)
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static void commonErrorHandler(XtExcFrame *frame)
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{
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int *regs = (int *)frame;
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int x, y;
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@ -304,21 +307,28 @@ void commonErrorHandler(XtExcFrame *frame)
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//Feed the watchdogs, so they will give us time to print out debug info
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reconfigureAllWdts();
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panicPutStr("Register dump:\r\n");
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/* only dump registers for 'real' crashes, if crashing via abort()
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the register window is no longer useful.
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*/
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if (!abort_called) {
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panicPutStr("Register dump:\r\n");
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for (x = 0; x < 24; x += 4) {
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for (y = 0; y < 4; y++) {
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if (sdesc[x + y][0] != 0) {
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panicPutStr(sdesc[x + y]);
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panicPutStr(": 0x");
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panicPutHex(regs[x + y + 1]);
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panicPutStr(" ");
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for (x = 0; x < 24; x += 4) {
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for (y = 0; y < 4; y++) {
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if (sdesc[x + y][0] != 0) {
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panicPutStr(sdesc[x + y]);
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panicPutStr(": 0x");
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panicPutHex(regs[x + y + 1]);
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panicPutStr(" ");
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}
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}
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panicPutStr("\r\n");
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}
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panicPutStr("\r\n");
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}
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/* With windowed ABI backtracing is easy, let's do it. */
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doBacktrace(frame);
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#if CONFIG_ESP32_PANIC_GDBSTUB
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disableAllWdts();
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panicPutStr("Entering gdb stub now.\r\n");
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@ -339,8 +349,7 @@ void commonErrorHandler(XtExcFrame *frame)
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void esp_set_breakpoint_if_jtag(void *fn)
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{
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if (!inOCDMode()) {
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return;
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if (esp_cpu_in_ocd_debug_mode()) {
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setFirstBreakpoint((uint32_t)fn);
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}
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setFirstBreakpoint((uint32_t)fn);
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}
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@ -22,15 +22,6 @@
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#include "esp_attr.h"
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#include "freertos/FreeRTOS.h"
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void IRAM_ATTR abort()
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{
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do
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{
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__asm__ ("break 0,0");
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*((int*) 0) = 0;
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} while(true);
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}
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void* IRAM_ATTR _malloc_r(struct _reent *r, size_t size)
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{
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return pvPortMalloc(size);
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