Merge branch 'bugfix/config_panic_gdbstub_build_issue_v4.0' into 'release/v4.0'

esp32_gdbstub: fix build error with esp32-2019r1 toolchain (v4.0)

See merge request espressif/esp-idf!5764
This commit is contained in:
Angus Gratton 2019-08-20 13:11:24 +08:00
commit 16ee476a77
2 changed files with 6 additions and 2 deletions

View file

@ -429,6 +429,7 @@ static inline void disableAllWdts()
TIMERG1.wdt_wprotect = 0; TIMERG1.wdt_wprotect = 0;
} }
#if CONFIG_ESP32_PANIC_PRINT_REBOOT || CONFIG_ESP32_PANIC_SILENT_REBOOT
static void esp_panic_dig_reset() __attribute__((noreturn)); static void esp_panic_dig_reset() __attribute__((noreturn));
static void esp_panic_dig_reset() static void esp_panic_dig_reset()
@ -444,6 +445,7 @@ static void esp_panic_dig_reset()
; ;
} }
} }
#endif
static void putEntry(uint32_t pc, uint32_t sp) static void putEntry(uint32_t pc, uint32_t sp)
{ {

View file

@ -205,12 +205,14 @@ static void handle_H_command(const unsigned char* cmd, int len)
} else if (requested_task_index > s_scratch.task_count) { } else if (requested_task_index > s_scratch.task_count) {
ret = "E00"; ret = "E00";
} else { } else {
TaskHandle_t handle; TaskHandle_t handle = NULL;
get_task_handle(requested_task_index, &handle); get_task_handle(requested_task_index, &handle);
/* FIXME: for the task currently running on the other CPU, extracting the registers from TCB /* FIXME: for the task currently running on the other CPU, extracting the registers from TCB
* isn't valid. Need to use some IPC mechanism to obtain the registers of the other CPU * isn't valid. Need to use some IPC mechanism to obtain the registers of the other CPU
*/ */
esp_gdbstub_tcb_to_regfile(handle, &s_scratch.regfile); if (handle != NULL) {
esp_gdbstub_tcb_to_regfile(handle, &s_scratch.regfile);
}
} }
esp_gdbstub_send_str_packet(ret); esp_gdbstub_send_str_packet(ret);
} else { } else {