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Merge branch 'bugfix/improve_spi_timing_for_flash_v3.3' into 'release/v3.3' 

bugfix(flash): improve spi cs timing settings for flash (backport v3.3)

See merge request espressif/esp-idf!5514
This commit is contained in:
Jiang Jiang Jian 2019-08-20 16:33:57 +08:00
parent 5b11428f00 232408981d
commit 148a269808
4 changed files with 25 additions and 0 deletions
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8
components/bootloader_support/include/bootloader_common.h
View File

@ -141,3 +141,11 @@ esp_err_t bootloader_common_get_partition_description(const esp_partition_pos_t
* @brief Configure VDDSDIO, call this API to rise VDDSDIO to 1.9V when VDDSDIO regulator is enabled as 1.8V mode.
*/
void bootloader_common_vddsdio_configure();
/**
* @brief Set the flash CS setup and hold time.
*
* CS setup time is recomemded to be 1.5T, and CS hold time is recommended to be 2.5T.
* cs_setup = 1, cs_setup_time = 0; cs_hold = 1, cs_hold_time = 1
*/
void bootloader_common_set_flash_cs_timing();

11
components/bootloader_support/src/bootloader_common.c
View File

@ -29,6 +29,7 @@
#include "soc/gpio_periph.h"
#include "soc/efuse_reg.h"
#include "soc/rtc.h"
#include "soc/spi_reg.h"
#include "esp_image_format.h"
#include "bootloader_sha.h"
#include "sys/param.h"
@ -274,3 +275,13 @@ void bootloader_common_vddsdio_configure()
}
#endif // CONFIG_BOOTLOADER_VDDSDIO_BOOST
}
void bootloader_common_set_flash_cs_timing()
{
SET_PERI_REG_MASK(SPI_USER_REG(0), SPI_CS_HOLD_M | SPI_CS_SETUP_M);
SET_PERI_REG_BITS(SPI_CTRL2_REG(0), SPI_HOLD_TIME_V, 1, SPI_HOLD_TIME_S);
SET_PERI_REG_BITS(SPI_CTRL2_REG(0), SPI_SETUP_TIME_V, 0, SPI_SETUP_TIME_S);
SET_PERI_REG_MASK(SPI_USER_REG(1), SPI_CS_HOLD_M | SPI_CS_SETUP_M);
SET_PERI_REG_BITS(SPI_CTRL2_REG(1), SPI_HOLD_TIME_V, 1, SPI_HOLD_TIME_S);
SET_PERI_REG_BITS(SPI_CTRL2_REG(1), SPI_SETUP_TIME_V, 0, SPI_SETUP_TIME_S);
}

3
components/bootloader_support/src/bootloader_init.c
View File

@ -397,6 +397,9 @@ static void IRAM_ATTR flash_gpio_configure(const esp_image_header_t* pfhdr)
#endif
}
}
// improve the flash cs timing.
bootloader_common_set_flash_cs_timing();
}
static void uart_console_configure(void)

3
components/esp32/cpu_start.c
View File

@ -72,6 +72,7 @@
#include "pm_impl.h"
#include "trax.h"
#include "esp_ota_ops.h"
#include "bootloader_common.h"
#define STRINGIFY(s) STRINGIFY2(s)
#define STRINGIFY2(s) #s
@ -173,6 +174,8 @@ void IRAM_ATTR call_start_cpu0()
abort();
#endif
}
# else // If psram is uninitialized, we need to improve the flash cs timing.
bootloader_common_set_flash_cs_timing();
#endif
ESP_EARLY_LOGI(TAG, "Pro cpu up.");