Merge branch 'bugfix/esp32_core_dump_sanity_checks' into 'master'
esp32: Core dump sanity checks Adds sanity checks when doing core dump to flash - CRC for core dump flash partition config - Tasks with corrupted TCBs are skipped - Assertions to check that nothing is written beyond core dump flash partition Ref TW11879 See merge request !686
This commit is contained in:
Ivan Grokhotkov
commit
1324e565fa
3 changed files with 159 additions and 68 deletions
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@ -19,6 +19,7 @@
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#include "soc/timer_group_struct.h"
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#include "soc/timer_group_reg.h"
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#include "driver/gpio.h"
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#include "rom/crc.h"
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#include "esp_panic.h"
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#include "esp_partition.h"
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@ -41,74 +42,128 @@ const static DRAM_ATTR char TAG[] = "esp_core_dump";
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#define ESP_COREDUMP_LOG_PROCESS( format, ... ) do{/*(__VA_ARGS__);*/}while(0)
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#endif
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// TODO: allow user to set this in menuconfig or get tasks iteratively
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#define COREDUMP_MAX_TASKS_NUM 32
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#define COREDUMP_MAX_TASK_STACK_SIZE (64*1024)
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typedef esp_err_t (*esp_core_dump_write_prepare_t)(void *priv, uint32_t *data_len);
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typedef esp_err_t (*esp_core_dump_write_start_t)(void *priv);
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typedef esp_err_t (*esp_core_dump_write_end_t)(void *priv);
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typedef esp_err_t (*esp_core_dump_flash_write_data_t)(void *priv, void * data, uint32_t data_len);
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/** core dump emitter control structure */
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typedef struct _core_dump_write_config_t
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{
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// this function is called before core dump data writing
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// used for sanity checks
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esp_core_dump_write_prepare_t prepare;
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// this function is called at the beginning of data writing
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esp_core_dump_write_start_t start;
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// this function is called when all dump data are written
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esp_core_dump_write_end_t end;
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// this function is called to write data chunk
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esp_core_dump_flash_write_data_t write;
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// number of tasks with corrupted TCBs
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uint32_t bad_tasks_num;
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// pointer to data which are specific for particular core dump emitter
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void * priv;
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} core_dump_write_config_t;
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/** core dump data header */
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typedef struct _core_dump_header_t
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{
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uint32_t data_len; // data length
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uint32_t tasks_num; // number of tasks
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uint32_t tcb_sz; // size of TCB
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} core_dump_header_t;
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/** core dump task data header */
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typedef struct _core_dump_task_header_t
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{
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void * tcb_addr; // TCB address
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uint32_t stack_start; // stack start address
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uint32_t stack_end; // stack end address
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} core_dump_task_header_t;
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static inline bool esp_task_stack_start_is_sane(uint32_t sp)
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{
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return !(sp < 0x3ffae010UL || sp > 0x3fffffffUL);
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}
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static inline bool esp_tcb_addr_is_sane(uint32_t addr, uint32_t sz)
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{
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//TODO: currently core dump supports TCBs in DRAM only, external SRAM not supported yet
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return !(addr < 0x3ffae000UL || (addr + sz) > 0x40000000UL);
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}
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static void esp_core_dump_write(XtExcFrame *frame, core_dump_write_config_t *write_cfg)
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{
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union
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{
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uint8_t data8[12];
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uint32_t data32[3];
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} rom_data;
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int cur_task_bad = 0;
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esp_err_t err;
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TaskSnapshot_t tasks[COREDUMP_MAX_TASKS_NUM];
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UBaseType_t tcb_sz, task_num;
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UBaseType_t tcb_sz, tcb_sz_padded, task_num;
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uint32_t data_len = 0, i, len;
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union
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{
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core_dump_header_t hdr;
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core_dump_task_header_t task_hdr;
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} dump_data;
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task_num = uxTaskGetSnapshotAll(tasks, COREDUMP_MAX_TASKS_NUM, &tcb_sz);
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// take TCB padding into account, actual TCB size will be stored in header
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if (tcb_sz % sizeof(uint32_t))
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len = (tcb_sz / sizeof(uint32_t) + 1) * sizeof(uint32_t);
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tcb_sz_padded = (tcb_sz / sizeof(uint32_t) + 1) * sizeof(uint32_t);
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else
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len = tcb_sz;
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tcb_sz_padded = tcb_sz;
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// header + tasknum*(tcb + stack start/end + tcb addr)
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data_len = 3*sizeof(uint32_t) + task_num*(len + 2*sizeof(uint32_t) + sizeof(uint32_t *));
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data_len = sizeof(core_dump_header_t) + task_num*(tcb_sz_padded + sizeof(core_dump_task_header_t));
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for (i = 0; i < task_num; i++) {
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if (!esp_tcb_addr_is_sane((uint32_t)tasks[i].pxTCB, tcb_sz)) {
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ESP_COREDUMP_LOG_PROCESS("Bad TCB addr %x!", tasks[i].pxTCB);
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write_cfg->bad_tasks_num++;
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continue;
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}
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if (tasks[i].pxTCB == xTaskGetCurrentTaskHandleForCPU(xPortGetCoreID())) {
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// set correct stack top for current task
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tasks[i].pxTopOfStack = (StackType_t *)frame;
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ESP_COREDUMP_LOG_PROCESS("Current task EXIT/PC/PS/A0/SP %x %x %x %x %x", frame->exit, frame->pc, frame->ps, frame->a0, frame->a1);
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ESP_COREDUMP_LOG_PROCESS("Current task EXIT/PC/PS/A0/SP %x %x %x %x %x",
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frame->exit, frame->pc, frame->ps, frame->a0, frame->a1);
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}
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else {
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XtSolFrame *task_frame = (XtSolFrame *)tasks[i].pxTopOfStack;
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if (task_frame->exit == 0) {
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ESP_COREDUMP_LOG_PROCESS("Task EXIT/PC/PS/A0/SP %x %x %x %x %x", task_frame->exit, task_frame->pc, task_frame->ps, task_frame->a0, task_frame->a1);
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ESP_COREDUMP_LOG_PROCESS("Task EXIT/PC/PS/A0/SP %x %x %x %x %x",
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task_frame->exit, task_frame->pc, task_frame->ps, task_frame->a0, task_frame->a1);
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}
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else {
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#if CONFIG_ESP32_ENABLE_COREDUMP_TO_FLASH
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XtExcFrame *task_frame2 = (XtExcFrame *)tasks[i].pxTopOfStack;
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#endif
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ESP_COREDUMP_LOG_PROCESS("Task EXIT/PC/PS/A0/SP %x %x %x %x %x", task_frame2->exit, task_frame2->pc, task_frame2->ps, task_frame2->a0, task_frame2->a1);
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ESP_COREDUMP_LOG_PROCESS("Task EXIT/PC/PS/A0/SP %x %x %x %x %x",
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task_frame2->exit, task_frame2->pc, task_frame2->ps, task_frame2->a0, task_frame2->a1);
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}
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}
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#if( portSTACK_GROWTH < 0 )
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len = (uint32_t)tasks[i].pxEndOfStack - (uint32_t)tasks[i].pxTopOfStack;
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#else
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len = (uint32_t)tasks[i].pxTopOfStack - (uint32_t)tasks[i].pxEndOfStack;
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#endif
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// check task's stack
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if (!esp_stack_ptr_is_sane((uint32_t)tasks[i].pxTopOfStack) || !esp_task_stack_start_is_sane((uint32_t)tasks[i].pxEndOfStack)
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|| len > COREDUMP_MAX_TASK_STACK_SIZE) {
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if (tasks[i].pxTCB == xTaskGetCurrentTaskHandleForCPU(xPortGetCoreID())) {
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cur_task_bad = 1;
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}
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ESP_COREDUMP_LOG_PROCESS("Corrupted TCB %x: stack len %lu, top %x, end %x!",
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tasks[i].pxTCB, len, tasks[i].pxTopOfStack, tasks[i].pxEndOfStack);
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tasks[i].pxTCB = 0; // make TCB addr invalid to skip it in dump
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write_cfg->bad_tasks_num++;
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} else {
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ESP_COREDUMP_LOG_PROCESS("Stack len = %lu (%x %x)", len, tasks[i].pxTopOfStack, tasks[i].pxEndOfStack);
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// take stack padding into account
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if (len % sizeof(uint32_t))
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len = (len / sizeof(uint32_t) + 1) * sizeof(uint32_t);
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len = (len + sizeof(uint32_t) - 1) & ~(sizeof(uint32_t) - 1);
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data_len += len;
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}
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}
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data_len -= write_cfg->bad_tasks_num*(tcb_sz_padded + sizeof(core_dump_task_header_t));
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ESP_COREDUMP_LOG_PROCESS("Core dump len = %lu (%d %d)", data_len, task_num, write_cfg->bad_tasks_num);
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// prepare write
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if (write_cfg->prepare) {
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@ -118,9 +173,6 @@ static void esp_core_dump_write(XtExcFrame *frame, core_dump_write_config_t *wri
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return;
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}
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}
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ESP_COREDUMP_LOG_PROCESS("Core dump len = %lu", data_len);
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// write start
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if (write_cfg->start) {
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err = write_cfg->start(write_cfg->priv);
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@ -129,25 +181,27 @@ static void esp_core_dump_write(XtExcFrame *frame, core_dump_write_config_t *wri
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return;
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}
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}
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// write header
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rom_data.data32[0] = data_len;
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rom_data.data32[1] = task_num;
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rom_data.data32[2] = tcb_sz;
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err = write_cfg->write(write_cfg->priv, &rom_data, 3*sizeof(uint32_t));
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dump_data.hdr.data_len = data_len;
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dump_data.hdr.tasks_num = task_num - write_cfg->bad_tasks_num;
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dump_data.hdr.tcb_sz = tcb_sz;
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err = write_cfg->write(write_cfg->priv, &dump_data, sizeof(core_dump_header_t));
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if (err != ESP_OK) {
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ESP_COREDUMP_LOGE("Failed to write core dump header (%d)!", err);
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return;
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}
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// write tasks
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for (i = 0; i < task_num; i++) {
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if (!esp_tcb_addr_is_sane((uint32_t)tasks[i].pxTCB, tcb_sz)) {
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ESP_COREDUMP_LOG_PROCESS("Skip TCB with bad addr %x!", tasks[i].pxTCB);
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continue;
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}
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ESP_COREDUMP_LOG_PROCESS("Dump task %x", tasks[i].pxTCB);
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// save TCB address, stack base and stack top addr
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rom_data.data32[0] = (uint32_t)tasks[i].pxTCB;
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rom_data.data32[1] = (uint32_t)tasks[i].pxTopOfStack;
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rom_data.data32[2] = (uint32_t)tasks[i].pxEndOfStack;
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err = write_cfg->write(write_cfg->priv, &rom_data, 3*sizeof(uint32_t));
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dump_data.task_hdr.tcb_addr = tasks[i].pxTCB;
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dump_data.task_hdr.stack_start = (uint32_t)tasks[i].pxTopOfStack;
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dump_data.task_hdr.stack_end = (uint32_t)tasks[i].pxEndOfStack;
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err = write_cfg->write(write_cfg->priv, &dump_data, sizeof(core_dump_task_header_t));
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if (err != ESP_OK) {
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ESP_COREDUMP_LOGE("Failed to write task header (%d)!", err);
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return;
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@ -159,19 +213,16 @@ static void esp_core_dump_write(XtExcFrame *frame, core_dump_write_config_t *wri
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return;
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}
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// save task stack
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err = write_cfg->write(write_cfg->priv,
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#if( portSTACK_GROWTH < 0 )
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tasks[i].pxTopOfStack,
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(uint32_t)tasks[i].pxEndOfStack - (uint32_t)tasks[i].pxTopOfStack
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#else
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tasks[i].pxEndOfStack,
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(uint32_t)tasks[i].pxTopOfStack - (uint32_t)tasks[i].pxEndOfStack
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#endif
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);
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if (tasks[i].pxTopOfStack != 0 && tasks[i].pxEndOfStack != 0) {
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err = write_cfg->write(write_cfg->priv, tasks[i].pxTopOfStack,
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(uint32_t)tasks[i].pxEndOfStack - (uint32_t)tasks[i].pxTopOfStack);
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if (err != ESP_OK) {
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ESP_COREDUMP_LOGE("Failed to write task stack (%d)!", err);
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return;
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}
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} else {
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ESP_COREDUMP_LOG_PROCESS("Skip corrupted task %x stack!", tasks[i].pxTCB);
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}
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}
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// write end
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@ -182,6 +233,12 @@ static void esp_core_dump_write(XtExcFrame *frame, core_dump_write_config_t *wri
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return;
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}
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}
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if (write_cfg->bad_tasks_num) {
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ESP_COREDUMP_LOGE("Skipped %d tasks with bad TCB!", write_cfg->bad_tasks_num);
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if (cur_task_bad) {
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ESP_COREDUMP_LOGE("Crashed task has been skipped!");
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}
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}
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}
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#if CONFIG_ESP32_ENABLE_COREDUMP_TO_FLASH
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@ -195,10 +252,24 @@ typedef struct _core_dump_write_flash_data_t
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uint32_t off;
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} core_dump_write_flash_data_t;
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// core dump partition start
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static uint32_t s_core_part_start;
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// core dump partition size
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static uint32_t s_core_part_size;
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typedef struct _core_dump_partition_t
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{
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// core dump partition start
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uint32_t start;
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// core dump partition size
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uint32_t size;
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} core_dump_partition_t;
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typedef struct _core_dump_flash_config_t
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{
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// core dump partition start
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core_dump_partition_t partition;
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// core dump partition size
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uint32_t crc;
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} core_dump_flash_config_t;
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// core dump flash data
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static core_dump_flash_config_t s_core_flash_config;
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static uint32_t esp_core_dump_write_flash_padded(size_t off, uint8_t *data, uint32_t data_size)
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{
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@ -211,6 +282,11 @@ static uint32_t esp_core_dump_write_flash_padded(size_t off, uint8_t *data, uint
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} rom_data;
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data_len = (data_size / sizeof(uint32_t)) * sizeof(uint32_t);
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assert(off >= s_core_flash_config.partition.start);
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assert((off + data_len + (data_size % sizeof(uint32_t) ? sizeof(uint32_t) : 0)) <=
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s_core_flash_config.partition.start + s_core_flash_config.partition.size);
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err = spi_flash_write(off, data, data_len);
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if (err != ESP_OK) {
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ESP_COREDUMP_LOGE("Failed to write data to flash (%d)!", err);
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@ -240,8 +316,9 @@ static esp_err_t esp_core_dump_flash_write_prepare(void *priv, uint32_t *data_le
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uint32_t sec_num;
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core_dump_write_flash_data_t *wr_data = (core_dump_write_flash_data_t *)priv;
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// check for available space in partition
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// add space for 2 magics. TODO: change to CRC
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if ((*data_len + 2*sizeof(uint32_t)) > s_core_part_size) {
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if ((*data_len + 2*sizeof(uint32_t)) > s_core_flash_config.partition.size) {
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ESP_COREDUMP_LOGE("Not enough space to save core dump!");
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return ESP_ERR_NO_MEM;
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}
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@ -252,7 +329,8 @@ static esp_err_t esp_core_dump_flash_write_prepare(void *priv, uint32_t *data_le
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sec_num = *data_len / SPI_FLASH_SEC_SIZE;
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if (*data_len % SPI_FLASH_SEC_SIZE)
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sec_num++;
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err = spi_flash_erase_range(s_core_part_start + 0, sec_num * SPI_FLASH_SEC_SIZE);
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assert(sec_num * SPI_FLASH_SEC_SIZE <= s_core_flash_config.partition.size);
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err = spi_flash_erase_range(s_core_flash_config.partition.start + 0, sec_num * SPI_FLASH_SEC_SIZE);
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if (err != ESP_OK) {
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ESP_COREDUMP_LOGE("Failed to erase flash (%d)!", err);
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return err;
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@ -266,7 +344,8 @@ static esp_err_t esp_core_dump_flash_write_word(core_dump_write_flash_data_t *wr
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esp_err_t err = ESP_OK;
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uint32_t data32 = word;
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err = spi_flash_write(s_core_part_start + wr_data->off, &data32, sizeof(uint32_t));
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assert(wr_data->off + sizeof(uint32_t) <= s_core_flash_config.partition.size);
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err = spi_flash_write(s_core_flash_config.partition.start + wr_data->off, &data32, sizeof(uint32_t));
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if (err != ESP_OK) {
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ESP_COREDUMP_LOGE("Failed to write to flash (%d)!", err);
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return err;
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@ -287,21 +366,20 @@ static esp_err_t esp_core_dump_flash_write_end(void *priv)
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{
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core_dump_write_flash_data_t *wr_data = (core_dump_write_flash_data_t *)priv;
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#if LOG_LOCAL_LEVEL >= ESP_LOG_DEBUG
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uint32_t i;
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union
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{
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uint8_t data8[16];
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uint32_t data32[4];
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} rom_data;
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esp_err_t err = spi_flash_read(s_core_part_start + 0, &rom_data, sizeof(rom_data));
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esp_err_t err = spi_flash_read(s_core_flash_config.partition.start + 0, &rom_data, sizeof(rom_data));
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if (err != ESP_OK) {
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ESP_COREDUMP_LOGE("Failed to read flash (%d)!", err);
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return err;
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}
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else {
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ESP_COREDUMP_LOG_PROCESS("Data from flash:");
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for (i = 0; i < sizeof(rom_data)/sizeof(rom_data.data32[0]); i++) {
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for (uint32_t i = 0; i < sizeof(rom_data)/sizeof(rom_data.data32[0]); i++) {
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ESP_COREDUMP_LOG_PROCESS("%x", rom_data.data32[i]);
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}
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}
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@ -316,7 +394,7 @@ static esp_err_t esp_core_dump_flash_write_data(void *priv, void * data, uint32_
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esp_err_t err = ESP_OK;
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core_dump_write_flash_data_t *wr_data = (core_dump_write_flash_data_t *)priv;
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uint32_t len = esp_core_dump_write_flash_padded(s_core_part_start + wr_data->off, data, data_len);
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uint32_t len = esp_core_dump_write_flash_padded(s_core_flash_config.partition.start + wr_data->off, data, data_len);
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if (len != data_len)
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return ESP_FAIL;
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@ -330,9 +408,17 @@ void esp_core_dump_to_flash(XtExcFrame *frame)
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core_dump_write_config_t wr_cfg;
|
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core_dump_write_flash_data_t wr_data;
|
||||
|
||||
uint32_t crc = crc32_le(UINT32_MAX, (uint8_t const *)&s_core_flash_config.partition,
|
||||
sizeof(s_core_flash_config.partition));
|
||||
if (s_core_flash_config.crc != crc) {
|
||||
ESP_COREDUMP_LOGE("Core dump flash config is corrupted! CRC=0x%x instead of 0x%x", crc, s_core_flash_config.crc);
|
||||
return;
|
||||
}
|
||||
|
||||
/* init non-OS flash access critical section */
|
||||
spi_flash_guard_set(&g_flash_guard_no_os_ops);
|
||||
|
||||
memset(&wr_cfg, 0, sizeof(wr_cfg));
|
||||
wr_cfg.prepare = esp_core_dump_flash_write_prepare;
|
||||
wr_cfg.start = esp_core_dump_flash_write_start;
|
||||
wr_cfg.end = esp_core_dump_flash_write_end;
|
||||
|
|
@ -422,6 +508,7 @@ void esp_core_dump_to_uart(XtExcFrame *frame)
|
|||
uint32_t tm_end, tm_cur;
|
||||
int ch;
|
||||
|
||||
memset(&wr_cfg, 0, sizeof(wr_cfg));
|
||||
wr_cfg.prepare = NULL;
|
||||
wr_cfg.start = esp_core_dump_uart_write_start;
|
||||
wr_cfg.end = esp_core_dump_uart_write_end;
|
||||
|
|
@ -461,8 +548,10 @@ void esp_core_dump_init()
|
|||
return;
|
||||
}
|
||||
ESP_COREDUMP_LOGI("Found partition '%s' @ %x %d bytes", core_part->label, core_part->address, core_part->size);
|
||||
s_core_part_start = core_part->address;
|
||||
s_core_part_size = core_part->size;
|
||||
s_core_flash_config.partition.start = core_part->address;
|
||||
s_core_flash_config.partition.size = core_part->size;
|
||||
s_core_flash_config.crc = crc32_le(UINT32_MAX, (uint8_t const *)&s_core_flash_config.partition,
|
||||
sizeof(s_core_flash_config.partition));
|
||||
#endif
|
||||
#if CONFIG_ESP32_ENABLE_COREDUMP_TO_UART
|
||||
ESP_COREDUMP_LOGI("Init core dump to UART");
|
||||
|
|
|
|||
|
|
@ -67,6 +67,13 @@ void esp_clear_watchpoint(int no);
|
|||
*/
|
||||
void esp_panic_wdt_stop(void);
|
||||
|
||||
/**
|
||||
* @brief Checks stack pointer
|
||||
*/
|
||||
static inline bool esp_stack_ptr_is_sane(uint32_t sp)
|
||||
{
|
||||
return !(sp < 0x3ffae010UL || sp > 0x3ffffff0UL || ((sp & 0xf) != 0));
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
|
|
|
|||
|
|
@ -347,11 +347,6 @@ static void esp_panic_dig_reset()
|
|||
}
|
||||
}
|
||||
|
||||
static inline bool stackPointerIsSane(uint32_t sp)
|
||||
{
|
||||
return !(sp < 0x3ffae010 || sp > 0x3ffffff0 || ((sp & 0xf) != 0));
|
||||
}
|
||||
|
||||
static void putEntry(uint32_t pc, uint32_t sp)
|
||||
{
|
||||
if (pc & 0x80000000) {
|
||||
|
|
@ -372,7 +367,7 @@ static void doBacktrace(XtExcFrame *frame)
|
|||
pc = frame->a0;
|
||||
while (i++ < 100) {
|
||||
uint32_t psp = sp;
|
||||
if (!stackPointerIsSane(sp) || i++ > 100) {
|
||||
if (!esp_stack_ptr_is_sane(sp) || i++ > 100) {
|
||||
break;
|
||||
}
|
||||
sp = *((uint32_t *) (sp - 0x10 + 4));
|
||||
|
|
|
|||
Loading…
Reference in a new issue