diff --git a/components/bootloader/Kconfig.projbuild b/components/bootloader/Kconfig.projbuild
index ccc2f9bcd..2b200f1bc 100644
--- a/components/bootloader/Kconfig.projbuild
+++ b/components/bootloader/Kconfig.projbuild
@@ -411,6 +411,26 @@ menu "Security features"
 
             Read https://docs.espressif.com/projects/esp-idf/en/latest/security/flash-encryption.html before enabling.
 
+    choice FLASH_ENCRYPTION_GENERATE_KEYSIZE
+        bool "Size of generated AES-XTS key"
+        default FLASH_ENCRYPTION_AES128
+        depends on IDF_TARGET_ESP32S2BETA && FLASH_ENCRYPTION_ENABLED
+        help
+            Size of generated AES-XTS key.
+
+            AES-128 uses a 256-bit key (32 bytes) which occupies one Efuse key block.
+            AES-256 uses a 512-bit key (64 bytes) which occupies two Efuse key blocks.
+
+            This setting is ignored if either type of key is already burned to Efuse before the first boot.
+            In this case, the pre-burned key is used and no new key is generated.
+
+        config FLASH_ENCRYPTION_AES128
+            bool "AES-128 (256-bit key)"
+
+        config FLASH_ENCRYPTION_AES256
+            bool "AES-256 (512-bit key)"
+    endchoice
+
     config SECURE_FLASH_ENC_INSECURE
         bool "Allow potentially insecure options"
         depends on SECURE_FLASH_ENC_ENABLED
diff --git a/components/bootloader/subproject/main/CMakeLists.txt b/components/bootloader/subproject/main/CMakeLists.txt
index 54c62e211..3dfdf825a 100644
--- a/components/bootloader/subproject/main/CMakeLists.txt
+++ b/components/bootloader/subproject/main/CMakeLists.txt
@@ -4,7 +4,15 @@ set(COMPONENT_REQUIRES bootloader bootloader_support)
 register_component()
 
 idf_build_get_property(target IDF_TARGET)
-set(scripts "${target}.bootloader.ld"
-            "${target}.bootloader.rom.ld")
 
-target_linker_script(${COMPONENT_LIB} "${scripts}")
\ No newline at end of file
+target_linker_script(${COMPONENT_LIB}
+    "ld/${target}/bootloader.ld"
+    "ld/${target}/bootloader.rom.ld"
+)
+
+set(scripts
+    "${IDF_PATH}/components/esp_rom/${target}/ld/${target}.rom.ld"
+    "${IDF_PATH}/components/esp_rom/${target}/ld/${target}.rom.newlib-funcs.ld"
+    "${IDF_PATH}/components/${target}/ld/${target}.peripherals.ld")
+
+target_linker_script(${COMPONENT_LIB} ${scripts})
diff --git a/components/bootloader/subproject/main/component.mk b/components/bootloader/subproject/main/component.mk
index c74985132..535b78e6a 100644
--- a/components/bootloader/subproject/main/component.mk
+++ b/components/bootloader/subproject/main/component.mk
@@ -6,14 +6,17 @@
 #
 
 LINKER_SCRIPTS := \
-    $(IDF_TARGET).bootloader.ld \
-    $(IDF_TARGET).bootloader.rom.ld \
+    $(COMPONENT_PATH)/ld/$(IDF_TARGET)/bootloader.ld \
+    $(COMPONENT_PATH)/ld/$(IDF_TARGET)/bootloader.rom.ld \
     $(IDF_PATH)/components/esp_rom/$(IDF_TARGET)/ld/$(IDF_TARGET).rom.ld \
     $(IDF_PATH)/components/esp_rom/$(IDF_TARGET)/ld/$(IDF_TARGET).rom.newlib-funcs.ld \
     $(IDF_PATH)/components/$(IDF_TARGET)/ld/$(IDF_TARGET).peripherals.ld
 
-ifndef CONFIG_SPI_FLASH_ROM_DRIVER_PATCH
-LINKER_SCRIPTS += $(IDF_PATH)/components/esp_rom/$(IDF_TARGET)/ld/$(IDF_TARGET).rom.spiflash.ld
+# SPI driver patch for ROM is only needed in ESP32
+ifdef CONFIG_IDF_TARGET_ESP32
+    ifndef CONFIG_SPI_FLASH_ROM_DRIVER_PATCH
+        LINKER_SCRIPTS += $(IDF_PATH)/components/esp_rom/$(IDF_TARGET)/ld/$(IDF_TARGET).rom.spiflash.ld
+    endif
 endif
 
 COMPONENT_ADD_LDFLAGS += -L $(COMPONENT_PATH) $(addprefix -T ,$(LINKER_SCRIPTS))
diff --git a/components/bootloader/subproject/main/esp32.bootloader.ld b/components/bootloader/subproject/main/ld/esp32/bootloader.ld
similarity index 100%
rename from components/bootloader/subproject/main/esp32.bootloader.ld
rename to components/bootloader/subproject/main/ld/esp32/bootloader.ld
diff --git a/components/bootloader/subproject/main/esp32.bootloader.rom.ld b/components/bootloader/subproject/main/ld/esp32/bootloader.rom.ld
similarity index 100%
rename from components/bootloader/subproject/main/esp32.bootloader.rom.ld
rename to components/bootloader/subproject/main/ld/esp32/bootloader.rom.ld
diff --git a/components/bootloader/subproject/main/ld/esp32s2beta/bootloader.ld b/components/bootloader/subproject/main/ld/esp32s2beta/bootloader.ld
new file mode 100644
index 000000000..c2861a4ff
--- /dev/null
+++ b/components/bootloader/subproject/main/ld/esp32s2beta/bootloader.ld
@@ -0,0 +1,163 @@
+/*
+Linker file used to link the bootloader.
+*/
+
+
+/* Simplified memory map for the bootloader
+
+   The main purpose is to make sure the bootloader can load into main memory
+   without overwriting itself.
+*/
+
+MEMORY
+{
+  /* I/O */
+  dport0_seg (RW) :                 org = 0x3FF00000, len = 0x10
+  /* IRAM POOL1, used for APP CPU cache. Bootloader runs from here during the final stage of loading the app because APP CPU is still held in reset, the main app enables APP CPU cache */
+  iram_loader_seg (RWX) :           org = 0x40022000, len = 0x2000  /* 8KB, APP CPU cache */
+  iram_seg (RWX) :                  org = 0x40024000, len = 0x4000  /* 16KB, IRAM */
+  /* 12k at the end of DRAM, after ROM bootloader stack */
+  dram_seg (RW) :                   org = 0x3FFF5000, len = 0x3000
+}
+
+/*  Default entry point:  */
+ENTRY(call_start_cpu0);
+
+
+SECTIONS
+{
+
+  .iram_loader.text :
+  {
+    . = ALIGN (16);
+    _loader_text_start = ABSOLUTE(.);
+    *(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
+     *(.iram1 .iram1.*) /* catch stray IRAM_ATTR */
+    *liblog.a:(.literal .text .literal.* .text.*)
+    *libgcc.a:(.literal .text .literal.* .text.*)
+    *libbootloader_support.a:bootloader_common.*(.literal .text .literal.* .text.*)
+    *libbootloader_support.a:bootloader_flash.*(.literal .text .literal.* .text.*)
+    *libbootloader_support.a:bootloader_random.*(.literal .text .literal.* .text.*)
+    *libbootloader_support.a:bootloader_utility.*(.literal .text .literal.* .text.*)
+    *libbootloader_support.a:bootloader_sha.*(.literal .text .literal.* .text.*)
+    *libbootloader_support.a:esp_image_format.*(.literal .text .literal.* .text.*)
+    *libbootloader_support.a:flash_encrypt.*(.literal .text .literal.* .text.*)
+    *libbootloader_support.a:flash_partitions.*(.literal .text .literal.* .text.*)
+    *libbootloader_support.a:secure_boot.*(.literal .text .literal.* .text.*)
+    *libbootloader_support.a:secure_boot_signatures.*(.literal .text .literal.* .text.*)
+    *libmicro-ecc.a:*.*(.literal .text .literal.* .text.*)
+    *libspi_flash.a:*.*(.literal .text .literal.* .text.*)
+    *libsoc.a:rtc_wdt.*(.literal .text .literal.* .text.*)
+    *libefuse.a:*.*(.literal .text .literal.* .text.*)
+    *(.fini.literal)
+    *(.fini)
+    *(.gnu.version)
+    _loader_text_end = ABSOLUTE(.);
+  } > iram_loader_seg
+
+  .iram.text :
+  {
+    . = ALIGN (16);
+    *(.entry.text)
+    *(.init.literal)
+    *(.init)
+  } > iram_seg
+
+
+  /* Shared RAM */
+  .dram0.bss (NOLOAD) :
+  {
+    . = ALIGN (8);
+    _bss_start = ABSOLUTE(.);
+    *(.dynsbss)
+    *(.sbss)
+    *(.sbss.*)
+    *(.gnu.linkonce.sb.*)
+    *(.scommon)
+    *(.sbss2)
+    *(.sbss2.*)
+    *(.gnu.linkonce.sb2.*)
+    *(.dynbss)
+    *(.bss)
+    *(.bss.*)
+    *(.gnu.linkonce.b.*)
+    *(COMMON)
+    . = ALIGN (8);
+    _bss_end = ABSOLUTE(.);
+  } >dram_seg
+
+  .dram0.data :
+  {
+    _data_start = ABSOLUTE(.);
+    *(.data)
+    *(.data.*)
+    *(.gnu.linkonce.d.*)
+    *(.data1)
+    *(.sdata)
+    *(.sdata.*)
+    *(.gnu.linkonce.s.*)
+    *(.sdata2)
+    *(.sdata2.*)
+    *(.gnu.linkonce.s2.*)
+    *(.jcr)
+    _data_end = ABSOLUTE(.);
+  } >dram_seg
+
+  .dram0.rodata :
+  {
+    _rodata_start = ABSOLUTE(.);
+    *(.rodata)
+    *(.rodata.*)
+    *(.gnu.linkonce.r.*)
+    *(.rodata1)
+    __XT_EXCEPTION_TABLE_ = ABSOLUTE(.);
+    *(.xt_except_table)
+    *(.gcc_except_table)
+    *(.gnu.linkonce.e.*)
+    *(.gnu.version_r)
+    *(.eh_frame)
+    . = (. + 3) & ~ 3;
+    /*  C++ constructor and destructor tables, properly ordered:  */
+    __init_array_start = ABSOLUTE(.);
+    KEEP (*crtbegin.*(.ctors))
+    KEEP (*(EXCLUDE_FILE (*crtend.*) .ctors))
+    KEEP (*(SORT(.ctors.*)))
+    KEEP (*(.ctors))
+    __init_array_end = ABSOLUTE(.);
+    KEEP (*crtbegin.*(.dtors))
+    KEEP (*(EXCLUDE_FILE (*crtend.*) .dtors))
+    KEEP (*(SORT(.dtors.*)))
+    KEEP (*(.dtors))
+    /*  C++ exception handlers table:  */
+    __XT_EXCEPTION_DESCS_ = ABSOLUTE(.);
+    *(.xt_except_desc)
+    *(.gnu.linkonce.h.*)
+    __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
+    *(.xt_except_desc_end)
+    *(.dynamic)
+    *(.gnu.version_d)
+    _rodata_end = ABSOLUTE(.);
+	/* Literals are also RO data. */
+    _lit4_start = ABSOLUTE(.);
+    *(*.lit4)
+    *(.lit4.*)
+    *(.gnu.linkonce.lit4.*)
+    _lit4_end = ABSOLUTE(.);
+    . = ALIGN(4);
+    _heap_start = ABSOLUTE(.);
+  } >dram_seg
+
+  .iram.text :
+  {
+    _stext = .;
+    _text_start = ABSOLUTE(.);
+    *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
+    *(.iram .iram.*) /* catch stray IRAM_ATTR */
+    *(.fini.literal)
+    *(.fini)
+    *(.gnu.version)
+    _text_end = ABSOLUTE(.);
+    _etext = .;
+  } > iram_seg
+
+}
diff --git a/components/bootloader/subproject/main/ld/esp32s2beta/bootloader.rom.ld b/components/bootloader/subproject/main/ld/esp32s2beta/bootloader.rom.ld
new file mode 100644
index 000000000..32d94a070
--- /dev/null
+++ b/components/bootloader/subproject/main/ld/esp32s2beta/bootloader.rom.ld
@@ -0,0 +1,14 @@
+/*
+ * ESP32S2 ROM address table
+ * Generated for ROM with MD5sum: f054d40c5f6b9207d3827460a6f5748c
+*/
+PROVIDE ( ets_update_cpu_frequency = 0x4000d954 );
+
+/* ToDo: Following address may need modification */
+PROVIDE ( MD5Final = 0x4005db1c );
+PROVIDE ( MD5Init = 0x4005da7c );
+PROVIDE ( MD5Update = 0x4005da9c );
+/* bootloader will use following functions from xtensa hal library */
+xthal_get_ccount = 0x4000c050;
+xthal_get_ccompare = 0x4000c078;
+xthal_set_ccompare = 0x4000c058;