From 103a2a0079f222b98eb2636e84a8b33de8344993 Mon Sep 17 00:00:00 2001 From: Angus Gratton Date: Wed, 21 Sep 2016 11:24:02 +1000 Subject: [PATCH] esp32: Allow RTC slow memory to be reserved for ULP coprocessor --- components/esp32/Kconfig | 24 ++++++++++++++++++++++++ components/esp32/ld/esp32.ld | 8 ++++++-- 2 files changed, 30 insertions(+), 2 deletions(-) diff --git a/components/esp32/Kconfig b/components/esp32/Kconfig index a43d16d2c..3770966a0 100644 --- a/components/esp32/Kconfig +++ b/components/esp32/Kconfig @@ -110,4 +110,28 @@ config NEWLIB_STDOUT_ADDCR is usually done by an added CR character. Enabling this will make the standard output code automatically add a CR character before a LF. +config ULP_COPROC_ENABLED + bool "Enable Ultra Low Power (ULP) Coprocessor" + default "n" + help + Set to 'y' if you plan to load a firmware for the coprocessor. + + If this option is enabled, further coprocessor configuration will appear in the Components menu. + +config ULP_COPROC_RESERVE_MEM + int "RTC slow memory reserved for coprocessor" + default 512 + range 32 8192 + depends on ULP_COPROC_ENABLED + help + Bytes of memory to reserve for ULP coprocessor firmware & data. + + Data is reserved at the beginning of RTC slow memory. + +# Set CONFIG_ULP_COPROC_RESERVE_MEM to 0 if ULP is disabled +config ULP_COPROC_RESERVE_MEM + int + default 0 + depends on !ULP_COPROC_ENABLED + endmenu diff --git a/components/esp32/ld/esp32.ld b/components/esp32/ld/esp32.ld index c44b2e42a..7ecfd19e5 100644 --- a/components/esp32/ld/esp32.ld +++ b/components/esp32/ld/esp32.ld @@ -43,8 +43,12 @@ MEMORY */ rtc_iram_seg(RWX) : org = 0x400C0000, len = 0x2000 - /* RTC slow memory (data accessible). Persists over deep sleep. */ - rtc_slow_seg(RW) : org = 0x50000000, len = 0x2000 + /* RTC slow memory (data accessible). Persists over deep sleep. + + Start of RTC slow memory is reserved for ULP co-processor code + data, if enabled. + */ + rtc_slow_seg(RW) : org = 0x50000000 + CONFIG_ULP_COPROC_RESERVE_MEM, + len = 0x2000 - CONFIG_ULP_COPROC_RESERVE_MEM } /* Heap ends at top of dram0_0_seg */