diff --git a/components/esp32s2/ld/esp32s2.ld b/components/esp32s2/ld/esp32s2.ld
index 0fb291af8..b742f3336 100644
--- a/components/esp32s2/ld/esp32s2.ld
+++ b/components/esp32s2/ld/esp32s2.ld
@@ -88,11 +88,7 @@ MEMORY
 
 _static_data_end = _bss_end;
 
-/* Heap ends at top of dram0_0_seg
-   ROM data mappings start from 0x3FFFC000,
-  0x3FFF4000...0x3FFFC000 can be reserved for trace memory mapping
-*/
-_heap_end = 0x3FFFC000 - CONFIG_ESP32S2_TRACEMEM_RESERVE_DRAM;
+_heap_end = 0x40000000;
 
 _data_seg_org = ORIGIN(rtc_data_seg);
 
diff --git a/components/soc/esp32s2/soc_memory_layout.c b/components/soc/esp32s2/soc_memory_layout.c
index a95e5b164..b3ad22e43 100644
--- a/components/soc/esp32s2/soc_memory_layout.c
+++ b/components/soc/esp32s2/soc_memory_layout.c
@@ -130,5 +130,9 @@ SOC_RESERVE_MEMORY_REGION((intptr_t)&_iram_start - I_D_OFFSET, (intptr_t)&_iram_
 SOC_RESERVE_MEMORY_REGION( SOC_EXTRAM_DATA_LOW, SOC_EXTRAM_DATA_HIGH, extram_data_region); //SPI RAM gets added later if needed, in spiram.c; reserve it for now
 #endif
 
-
+// Blocks 19 and 20 may be reserved for the trace memory
+#if CONFIG_ESP32S2_TRACEMEM_RESERVE_DRAM > 0
+SOC_RESERVE_MEMORY_REGION(0x3fffc000 - CONFIG_ESP32S2_TRACEMEM_RESERVE_DRAM, 0x3fffc000, trace_mem);
 #endif
+
+#endif // BOOTLOADER_BUILD