2016-08-17 15:08:22 +00:00
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// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include <stdint.h>
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#include <string.h>
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#include "esp_attr.h"
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#include "esp_err.h"
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#include "rom/ets_sys.h"
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2016-09-13 03:48:28 +00:00
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#include "rom/uart.h"
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2016-10-13 00:46:51 +00:00
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#include "rom/rtc.h"
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2016-11-04 04:18:57 +00:00
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#include "rom/cache.h"
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2016-08-17 15:08:22 +00:00
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2016-09-14 17:59:42 +00:00
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#include "soc/cpu.h"
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2016-08-17 15:08:22 +00:00
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#include "soc/dport_reg.h"
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#include "soc/io_mux_reg.h"
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2016-09-14 17:59:42 +00:00
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#include "soc/rtc_cntl_reg.h"
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2016-08-17 15:08:22 +00:00
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#include "freertos/FreeRTOS.h"
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#include "freertos/task.h"
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#include "freertos/semphr.h"
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#include "freertos/queue.h"
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#include "freertos/portmacro.h"
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#include "tcpip_adapter.h"
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#include "heap_alloc_caps.h"
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#include "sdkconfig.h"
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#include "esp_system.h"
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#include "esp_spi_flash.h"
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#include "nvs_flash.h"
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#include "esp_event.h"
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2016-09-12 10:54:45 +00:00
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#include "esp_spi_flash.h"
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#include "esp_ipc.h"
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2016-10-27 04:37:19 +00:00
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#include "esp_crosscore_int.h"
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2016-09-14 16:53:33 +00:00
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#include "esp_log.h"
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2016-10-25 14:16:08 +00:00
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#include "esp_vfs_dev.h"
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2016-10-25 14:12:07 +00:00
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#include "esp_newlib.h"
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2016-10-21 09:59:57 +00:00
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#include "esp_brownout.h"
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2016-10-21 11:30:29 +00:00
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#include "esp_int_wdt.h"
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#include "esp_task_wdt.h"
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2016-11-15 10:36:18 +00:00
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#include "esp_phy_init.h"
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2016-11-24 11:57:47 +00:00
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#include "esp_coexist.h"
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2016-10-17 04:18:17 +00:00
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#include "trax.h"
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2016-10-21 09:59:57 +00:00
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2016-09-26 04:29:00 +00:00
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void start_cpu0(void) __attribute__((weak, alias("start_cpu0_default")));
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void start_cpu0_default(void) IRAM_ATTR;
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2016-09-23 07:02:17 +00:00
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#if !CONFIG_FREERTOS_UNICORE
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2016-09-26 04:29:00 +00:00
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static void IRAM_ATTR call_start_cpu1();
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2016-09-26 07:58:58 +00:00
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void start_cpu1(void) __attribute__((weak, alias("start_cpu1_default")));
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2016-09-26 06:35:09 +00:00
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void start_cpu1_default(void) IRAM_ATTR;
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2016-09-23 07:02:17 +00:00
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static bool app_cpu_started = false;
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2016-09-26 06:35:09 +00:00
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#endif //!CONFIG_FREERTOS_UNICORE
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2016-09-26 04:29:00 +00:00
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static void do_global_ctors(void);
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2016-11-17 17:18:39 +00:00
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static void do_phy_init();
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2016-09-26 04:29:00 +00:00
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static void main_task(void* args);
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2016-09-27 09:30:43 +00:00
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extern void app_main(void);
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2016-08-17 15:08:22 +00:00
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extern int _bss_start;
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extern int _bss_end;
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2016-10-13 00:46:51 +00:00
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extern int _rtc_bss_start;
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extern int _rtc_bss_end;
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2016-08-17 15:08:22 +00:00
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extern int _init_start;
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2016-09-14 17:59:42 +00:00
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extern void (*__init_array_start)(void);
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extern void (*__init_array_end)(void);
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extern volatile int port_xSchedulerRunning[2];
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2016-08-17 15:08:22 +00:00
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2016-09-14 16:53:33 +00:00
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static const char* TAG = "cpu_start";
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2016-08-17 15:08:22 +00:00
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/*
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2016-09-14 17:59:42 +00:00
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* We arrive here after the bootloader finished loading the program from flash. The hardware is mostly uninitialized,
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* and the app CPU is in reset. We do have a stack, so we can do the initialization in C.
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*/
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2016-08-17 15:08:22 +00:00
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2016-09-26 04:29:00 +00:00
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void IRAM_ATTR call_start_cpu0()
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2016-09-14 17:59:42 +00:00
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{
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//Kill wdt
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2016-09-14 18:37:54 +00:00
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REG_CLR_BIT(RTC_CNTL_WDTCONFIG0_REG, RTC_CNTL_WDT_FLASHBOOT_MOD_EN);
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2016-09-14 17:59:42 +00:00
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REG_CLR_BIT(0x6001f048, BIT(14)); //DR_REG_BB_BASE+48
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cpu_configure_region_protection();
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//Move exception vectors to IRAM
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asm volatile (\
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"wsr %0, vecbase\n" \
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::"r"(&_init_start));
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uartAttach();
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ets_install_uart_printf();
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memset(&_bss_start, 0, (&_bss_end - &_bss_start) * sizeof(_bss_start));
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2016-10-13 00:46:51 +00:00
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/* Unless waking from deep sleep (implying RTC memory is intact), clear RTC bss */
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if (rtc_get_reset_reason(0) != DEEPSLEEP_RESET) {
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memset(&_rtc_bss_start, 0, (&_rtc_bss_end - &_rtc_bss_start) * sizeof(_rtc_bss_start));
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}
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2016-09-14 17:59:42 +00:00
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// Initialize heap allocator
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heap_alloc_caps_init();
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ESP_EARLY_LOGI(TAG, "Pro cpu up.");
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2016-08-24 08:21:28 +00:00
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2016-09-26 06:35:09 +00:00
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#if !CONFIG_FREERTOS_UNICORE
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2016-09-26 04:29:00 +00:00
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ESP_EARLY_LOGI(TAG, "Starting app cpu, entry point is %p", call_start_cpu1);
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2016-11-04 04:18:57 +00:00
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//Flush and enable icache for APP CPU
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Cache_Flush(1);
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Cache_Read_Enable(1);
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2016-10-27 03:17:24 +00:00
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//Un-stall the app cpu; the panic handler may have stalled it.
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CLEAR_PERI_REG_MASK(RTC_CNTL_SW_CPU_STALL_REG, RTC_CNTL_SW_STALL_APPCPU_C1_M);
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CLEAR_PERI_REG_MASK(RTC_CNTL_OPTIONS0_REG, RTC_CNTL_SW_STALL_APPCPU_C0_M);
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//Enable clock gating and reset the app cpu.
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2016-09-14 18:17:08 +00:00
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SET_PERI_REG_MASK(DPORT_APPCPU_CTRL_B_REG, DPORT_APPCPU_CLKGATE_EN);
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CLEAR_PERI_REG_MASK(DPORT_APPCPU_CTRL_C_REG, DPORT_APPCPU_RUNSTALL);
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SET_PERI_REG_MASK(DPORT_APPCPU_CTRL_A_REG, DPORT_APPCPU_RESETTING);
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CLEAR_PERI_REG_MASK(DPORT_APPCPU_CTRL_A_REG, DPORT_APPCPU_RESETTING);
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2016-09-26 04:29:00 +00:00
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ets_set_appcpu_boot_addr((uint32_t)call_start_cpu1);
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2016-08-17 15:08:22 +00:00
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2016-09-14 17:59:42 +00:00
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while (!app_cpu_started) {
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ets_delay_us(100);
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}
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2016-08-17 15:08:22 +00:00
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#else
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2016-09-14 17:59:42 +00:00
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ESP_EARLY_LOGI(TAG, "Single core mode");
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2016-09-14 18:17:08 +00:00
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CLEAR_PERI_REG_MASK(DPORT_APPCPU_CTRL_B_REG, DPORT_APPCPU_CLKGATE_EN);
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2016-08-17 15:08:22 +00:00
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#endif
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2016-09-14 17:59:42 +00:00
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ESP_EARLY_LOGI(TAG, "Pro cpu start user code");
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2016-09-26 04:29:00 +00:00
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start_cpu0();
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2016-08-17 15:08:22 +00:00
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}
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2016-09-23 07:02:17 +00:00
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#if !CONFIG_FREERTOS_UNICORE
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2016-09-26 04:29:00 +00:00
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void IRAM_ATTR call_start_cpu1()
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2016-09-14 17:59:42 +00:00
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{
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asm volatile (\
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"wsr %0, vecbase\n" \
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::"r"(&_init_start));
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2016-08-17 15:08:22 +00:00
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2016-09-14 17:59:42 +00:00
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cpu_configure_region_protection();
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2016-08-17 15:08:22 +00:00
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2016-09-14 17:59:42 +00:00
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ESP_EARLY_LOGI(TAG, "App cpu up.");
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app_cpu_started = 1;
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2016-09-26 04:29:00 +00:00
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start_cpu1();
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}
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2016-09-26 06:35:09 +00:00
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#endif //!CONFIG_FREERTOS_UNICORE
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2016-09-26 04:29:00 +00:00
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void start_cpu0_default(void)
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{
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2016-10-17 04:18:17 +00:00
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//Enable trace memory and immediately start trace.
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#if CONFIG_MEMMAP_TRACEMEM
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#if CONFIG_MEMMAP_TRACEMEM_TWOBANKS
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trax_enable(TRAX_ENA_PRO_APP);
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#else
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trax_enable(TRAX_ENA_PRO);
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#endif
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trax_start_trace(TRAX_DOWNCOUNT_WORDS);
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#endif
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2016-09-26 04:29:00 +00:00
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esp_set_cpu_freq(); // set CPU frequency configured in menuconfig
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uart_div_modify(0, (APB_CLK_FREQ << 4) / 115200);
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2016-10-21 09:59:57 +00:00
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#if CONFIG_BROWNOUT_DET
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esp_brownout_init();
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#endif
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#if CONFIG_INT_WDT
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2016-10-26 04:23:01 +00:00
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esp_int_wdt_init();
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2016-10-21 09:59:57 +00:00
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#endif
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#if CONFIG_TASK_WDT
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2016-10-26 04:23:01 +00:00
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esp_task_wdt_init();
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2016-10-21 09:59:57 +00:00
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#endif
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2016-11-02 09:17:28 +00:00
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esp_setup_syscall_table();
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esp_setup_time_syscalls();
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2016-10-25 14:16:08 +00:00
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esp_vfs_dev_uart_register();
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esp_reent_init(_GLOBAL_REENT);
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2016-10-26 06:05:56 +00:00
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const char* default_uart_dev = "/dev/uart/0";
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2016-11-08 01:08:23 +00:00
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_GLOBAL_REENT->_stdin = fopen(default_uart_dev, "r");
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2016-10-26 06:05:56 +00:00
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_GLOBAL_REENT->_stdout = fopen(default_uart_dev, "w");
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_GLOBAL_REENT->_stderr = fopen(default_uart_dev, "w");
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2016-10-26 04:23:01 +00:00
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do_global_ctors();
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2016-10-27 08:50:28 +00:00
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#if !CONFIG_FREERTOS_UNICORE
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2016-10-27 04:37:19 +00:00
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esp_crosscore_int_init();
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2016-10-27 08:50:28 +00:00
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#endif
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2016-10-26 04:23:01 +00:00
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esp_ipc_init();
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spi_flash_init();
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2016-10-21 09:59:57 +00:00
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2016-11-15 10:36:18 +00:00
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#if CONFIG_ESP32_PHY_AUTO_INIT
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nvs_flash_init();
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2016-11-17 17:18:39 +00:00
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do_phy_init();
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2016-11-15 10:36:18 +00:00
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#endif
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2016-11-24 11:57:47 +00:00
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#if CONFIG_SW_COEXIST_ENABLE
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2016-11-24 12:09:52 +00:00
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if (coex_init() == ESP_OK) {
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2016-11-24 11:57:47 +00:00
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coexist_set_enable(true);
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}
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#endif
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2016-09-26 04:29:00 +00:00
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xTaskCreatePinnedToCore(&main_task, "main",
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ESP_TASK_MAIN_STACK, NULL,
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ESP_TASK_MAIN_PRIO, NULL, 0);
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ESP_LOGI(TAG, "Starting scheduler on PRO CPU.");
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vTaskStartScheduler();
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2016-08-17 15:08:22 +00:00
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}
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2016-09-26 06:35:09 +00:00
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#if !CONFIG_FREERTOS_UNICORE
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2016-09-26 04:29:00 +00:00
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void start_cpu1_default(void)
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2016-09-14 17:59:42 +00:00
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{
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2016-10-17 04:18:17 +00:00
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#if CONFIG_MEMMAP_TRACEMEM_TWOBANKS
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trax_start_trace(TRAX_DOWNCOUNT_WORDS);
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#endif
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2016-09-14 17:59:42 +00:00
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// Wait for FreeRTOS initialization to finish on PRO CPU
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while (port_xSchedulerRunning[0] == 0) {
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;
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}
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2016-10-27 04:37:19 +00:00
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esp_crosscore_int_init();
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2016-09-14 17:59:42 +00:00
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ESP_LOGI(TAG, "Starting scheduler on APP CPU.");
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xPortStartScheduler();
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}
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2016-09-26 06:35:09 +00:00
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#endif //!CONFIG_FREERTOS_UNICORE
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2016-08-17 15:08:22 +00:00
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2016-09-14 17:59:42 +00:00
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static void do_global_ctors(void)
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{
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2016-08-17 15:08:22 +00:00
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void (**p)(void);
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2016-09-25 19:05:25 +00:00
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for (p = &__init_array_end - 1; p >= &__init_array_start; --p) {
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2016-08-17 15:08:22 +00:00
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(*p)();
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2016-09-14 17:59:42 +00:00
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}
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2016-08-17 15:08:22 +00:00
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}
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2016-09-26 04:29:00 +00:00
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static void main_task(void* args)
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2016-09-25 16:50:57 +00:00
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{
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2016-09-26 06:48:41 +00:00
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app_main();
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2016-09-25 16:50:57 +00:00
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vTaskDelete(NULL);
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}
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2016-11-17 17:18:39 +00:00
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static void do_phy_init()
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{
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esp_phy_calibration_mode_t calibration_mode = PHY_RF_CAL_PARTIAL;
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if (rtc_get_reset_reason(0) == DEEPSLEEP_RESET) {
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calibration_mode = PHY_RF_CAL_NONE;
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}
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const esp_phy_init_data_t* init_data = esp_phy_get_init_data();
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if (init_data == NULL) {
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ESP_LOGE(TAG, "failed to obtain PHY init data");
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abort();
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}
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esp_phy_calibration_data_t* cal_data =
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(esp_phy_calibration_data_t*) calloc(sizeof(esp_phy_calibration_data_t), 1);
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if (cal_data == NULL) {
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ESP_LOGE(TAG, "failed to allocate memory for RF calibration data");
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abort();
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}
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esp_err_t err = esp_phy_load_cal_data_from_nvs(cal_data);
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if (err != ESP_OK) {
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ESP_LOGW(TAG, "failed to load RF calibration data, falling back to full calibration");
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calibration_mode = PHY_RF_CAL_FULL;
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}
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esp_phy_init(init_data, calibration_mode, cal_data);
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if (calibration_mode != PHY_RF_CAL_NONE) {
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err = esp_phy_store_cal_data_to_nvs(cal_data);
|
|
|
|
} else {
|
|
|
|
err = ESP_OK;
|
|
|
|
}
|
|
|
|
esp_phy_release_init_data(init_data);
|
|
|
|
free(cal_data); // PHY maintains a copy of calibration data, so we can free this
|
|
|
|
}
|