2019-04-04 08:06:22 +00:00
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// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#ifndef _xtensa_perfmon_masks_H_
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#define _xtensa_perfmon_masks_H_
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#include <inttypes.h>
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#include "xtensa/xt_perf_consts.h"
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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/**
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* @brief Description for select parameter
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*
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* Structure defines description for different select values for performance counters
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*/
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typedef struct xtensa_perfmon_select {
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int select; /*!< Selected counter */
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const char *description; /*!< Description for selected counter */
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} xtensa_perfmon_select_t;
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/**
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* @brief Description for mask parameter
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*
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* Structure defines description for different select and mask values for performance counters
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*/
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typedef struct xtensa_perfmon_masks {
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int select; /*!< Selected counter */
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int mask; /*!< Selected mask for counter */
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const char *description; /*!< Description for selected mask */
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} xtensa_perfmon_masks_t;
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// Maximum amount of performance counter events
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2019-09-03 03:49:58 +00:00
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#define MAX_PERFMON_EVENTS 119
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2019-04-04 08:06:22 +00:00
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/**
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* @brief Select value description table
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*
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* Table contains description for different 'select' values for performance counter
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*/
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extern const xtensa_perfmon_select_t xtensa_perfmon_select_table[];
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/**
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* @brief Mask value description table
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*
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* Table contains description for different 'select' and 'mask' values for performance counter
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*/
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extern const xtensa_perfmon_masks_t xtensa_perfmon_masks_table[];
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/**
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* @brief All available counters
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*
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* Table contains all available counters
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*/
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extern const uint32_t xtensa_perfmon_select_mask_all[MAX_PERFMON_EVENTS * 2];
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#ifdef __cplusplus
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}
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#endif
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2019-09-03 03:49:58 +00:00
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#endif // _xtensa_perfmon_masks_H_
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