2016-10-18 13:49:00 +00:00
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// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include <stddef.h>
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#include <stdlib.h>
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#include <stdio.h>
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2017-04-05 13:19:15 +00:00
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#include <string.h>
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2016-10-18 13:49:00 +00:00
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2017-09-12 14:36:17 +00:00
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#include "esp_heap_caps_init.h"
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2016-10-18 13:49:00 +00:00
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#include "freertos/FreeRTOS.h"
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#include "freertos/task.h"
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#include "freertos/queue.h"
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#include "freertos/semphr.h"
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#include "freertos/xtensa_api.h"
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#include "freertos/portmacro.h"
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2017-10-20 09:09:03 +00:00
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#include "xtensa/core-macros.h"
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2016-10-18 13:49:00 +00:00
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#include "esp_types.h"
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#include "esp_system.h"
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#include "esp_task.h"
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#include "esp_intr.h"
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#include "esp_attr.h"
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2017-02-16 14:06:02 +00:00
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#include "esp_phy_init.h"
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2017-12-07 13:48:27 +00:00
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#include "esp_bt.h"
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2017-09-12 14:36:17 +00:00
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#include "esp_err.h"
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#include "esp_log.h"
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2017-10-09 07:34:31 +00:00
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#include "esp_pm.h"
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2017-10-20 09:09:03 +00:00
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#include "esp_ipc.h"
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2017-11-01 09:05:38 +00:00
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#include "driver/periph_ctrl.h"
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2016-10-18 13:49:00 +00:00
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#if CONFIG_BT_ENABLED
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2017-09-12 14:36:17 +00:00
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#define BTDM_LOG_TAG "BTDM_INIT"
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2017-06-13 09:14:50 +00:00
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#define BTDM_INIT_PERIOD (5000) /* ms */
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2017-02-21 09:46:59 +00:00
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/* Bluetooth system and controller config */
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2017-09-19 12:10:35 +00:00
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#define BTDM_CFG_BT_DATA_RELEASE (1<<0)
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#define BTDM_CFG_HCI_UART (1<<1)
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#define BTDM_CFG_CONTROLLER_RUN_APP_CPU (1<<2)
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2017-02-21 09:46:59 +00:00
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/* Other reserved for future */
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2016-10-18 13:49:00 +00:00
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/* not for user call, so don't put to include file */
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extern void btdm_osi_funcs_register(void *osi_funcs);
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2017-07-11 13:46:17 +00:00
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extern int btdm_controller_init(uint32_t config_mask, esp_bt_controller_config_t *config_opts);
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extern int btdm_controller_deinit(void);
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2017-02-17 11:24:58 +00:00
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extern int btdm_controller_enable(esp_bt_mode_t mode);
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extern int btdm_controller_disable(esp_bt_mode_t mode);
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2017-09-12 14:36:17 +00:00
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extern uint8_t btdm_controller_get_mode(void);
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2018-03-27 08:35:00 +00:00
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extern const char *btdm_controller_get_compile_version(void);
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2017-02-17 11:24:58 +00:00
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extern void btdm_rf_bb_init(void);
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2016-10-18 13:49:00 +00:00
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2017-01-03 07:53:06 +00:00
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/* VHCI function interface */
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typedef struct vhci_host_callback {
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void (*notify_host_send_available)(void); /*!< callback used to notify that the host can send packet to controller */
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int (*notify_host_recv)(uint8_t *data, uint16_t len); /*!< callback used to notify that the controller has a packet to send to the host*/
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} vhci_host_callback_t;
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extern bool API_vhci_host_check_send_available(void);
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extern void API_vhci_host_send_packet(uint8_t *data, uint16_t len);
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extern void API_vhci_host_register_callback(const vhci_host_callback_t *callback);
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2016-10-18 13:49:00 +00:00
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2017-07-11 13:46:17 +00:00
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extern int ble_txpwr_set(int power_type, int power_level);
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extern int ble_txpwr_get(int power_type);
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2017-09-19 12:10:35 +00:00
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extern char _bss_start_btdm;
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extern char _bss_end_btdm;
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extern char _data_start_btdm;
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extern char _data_end_btdm;
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extern uint32_t _data_start_btdm_rom;
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extern uint32_t _data_end_btdm_rom;
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2016-10-18 13:49:00 +00:00
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#define BT_DEBUG(...)
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#define BT_API_CALL_CHECK(info, api_call, ret) \
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do{\
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esp_err_t __err = (api_call);\
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if ((ret) != __err) {\
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2017-11-06 10:22:45 +00:00
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BT_DEBUG("%s %d %s ret=0x%X\n", __FUNCTION__, __LINE__, (info), __err);\
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2016-10-18 13:49:00 +00:00
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return __err;\
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}\
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} while(0)
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2017-07-11 13:46:17 +00:00
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#define OSI_FUNCS_TIME_BLOCKING 0xffffffff
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2017-09-19 12:10:35 +00:00
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typedef struct {
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esp_bt_mode_t mode;
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intptr_t start;
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intptr_t end;
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} btdm_dram_available_region_t;
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2018-02-13 06:55:18 +00:00
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/* the mode column will be modified by release function to indicate the available region */
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2017-09-19 12:10:35 +00:00
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static btdm_dram_available_region_t btdm_dram_available_region[] = {
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//following is .data
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{ESP_BT_MODE_BTDM, 0x3ffae6e0, 0x3ffaff10},
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//following is memory which HW will use
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{ESP_BT_MODE_BTDM, 0x3ffb0000, 0x3ffb09a8},
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{ESP_BT_MODE_BLE, 0x3ffb09a8, 0x3ffb1ddc},
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{ESP_BT_MODE_BTDM, 0x3ffb1ddc, 0x3ffb2730},
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{ESP_BT_MODE_CLASSIC_BT, 0x3ffb2730, 0x3ffb8000},
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//following is .bss
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{ESP_BT_MODE_BTDM, 0x3ffb8000, 0x3ffbbb28},
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{ESP_BT_MODE_CLASSIC_BT, 0x3ffbbb28, 0x3ffbdb28},
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{ESP_BT_MODE_BTDM, 0x3ffbdb28, 0x3ffc0000},
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};
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2016-10-18 13:49:00 +00:00
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struct osi_funcs_t {
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xt_handler (*_set_isr)(int n, xt_handler f, void *arg);
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void (*_ints_on)(unsigned int mask);
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void (*_interrupt_disable)(void);
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void (*_interrupt_restore)(void);
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void (*_task_yield)(void);
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2017-06-07 06:58:17 +00:00
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void (*_task_yield_from_isr)(void);
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2016-10-18 13:49:00 +00:00
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void *(*_semphr_create)(uint32_t max, uint32_t init);
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2017-07-11 13:46:17 +00:00
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void (*_semphr_delete)(void *semphr);
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int32_t (*_semphr_take_from_isr)(void *semphr, void *hptw);
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2016-10-18 13:49:00 +00:00
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int32_t (*_semphr_give_from_isr)(void *semphr, void *hptw);
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int32_t (*_semphr_take)(void *semphr, uint32_t block_time_ms);
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2017-07-11 13:46:17 +00:00
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int32_t (*_semphr_give)(void *semphr);
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2016-10-18 13:49:00 +00:00
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void *(*_mutex_create)(void);
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2017-07-11 13:46:17 +00:00
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void (*_mutex_delete)(void *mutex);
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2016-10-18 13:49:00 +00:00
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int32_t (*_mutex_lock)(void *mutex);
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int32_t (*_mutex_unlock)(void *mutex);
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2017-07-11 13:46:17 +00:00
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void *(* _queue_create)(uint32_t queue_len, uint32_t item_size);
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void (* _queue_delete)(void *queue);
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int32_t (* _queue_send)(void *queue, void *item, uint32_t block_time_ms);
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int32_t (* _queue_send_from_isr)(void *queue, void *item, void *hptw);
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int32_t (* _queue_recv)(void *queue, void *item, uint32_t block_time_ms);
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int32_t (* _queue_recv_from_isr)(void *queue, void *item, void *hptw);
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int32_t (* _task_create)(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id);
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void (* _task_delete)(void *task_handle);
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2017-07-25 11:58:39 +00:00
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bool (* _is_in_isr)(void);
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2017-10-20 09:09:03 +00:00
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int (* _cause_sw_intr_to_core)(int core_id, int intr_no);
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2017-07-11 13:46:17 +00:00
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void *(* _malloc)(uint32_t size);
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void (* _free)(void *p);
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2017-03-01 13:04:12 +00:00
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int32_t (* _read_efuse_mac)(uint8_t mac[6]);
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2017-03-24 06:57:07 +00:00
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void (* _srand)(unsigned int seed);
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int (* _rand)(void);
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2016-10-18 13:49:00 +00:00
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};
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2017-02-17 11:24:58 +00:00
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/* Static variable declare */
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static bool btdm_bb_init_flag = false;
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2017-02-20 17:05:37 +00:00
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static esp_bt_controller_status_t btdm_controller_status = ESP_BT_CONTROLLER_STATUS_IDLE;
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2017-02-17 11:24:58 +00:00
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2016-10-18 13:49:00 +00:00
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static portMUX_TYPE global_int_mux = portMUX_INITIALIZER_UNLOCKED;
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2017-10-09 07:34:31 +00:00
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#ifdef CONFIG_PM_ENABLE
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static esp_pm_lock_handle_t s_pm_lock;
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#endif
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2016-10-18 13:49:00 +00:00
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static void IRAM_ATTR interrupt_disable(void)
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{
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portENTER_CRITICAL(&global_int_mux);
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}
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static void IRAM_ATTR interrupt_restore(void)
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{
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portEXIT_CRITICAL(&global_int_mux);
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}
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2017-06-07 06:58:17 +00:00
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static void IRAM_ATTR task_yield_from_isr(void)
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{
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portYIELD_FROM_ISR();
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}
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2016-11-24 18:10:15 +00:00
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static void *IRAM_ATTR semphr_create_wrapper(uint32_t max, uint32_t init)
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2016-10-18 13:49:00 +00:00
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{
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return (void *)xSemaphoreCreateCounting(max, init);
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}
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2017-07-11 13:46:17 +00:00
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static void IRAM_ATTR semphr_delete_wrapper(void *semphr)
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{
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vSemaphoreDelete(semphr);
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}
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static int32_t IRAM_ATTR semphr_take_from_isr_wrapper(void *semphr, void *hptw)
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{
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return (int32_t)xSemaphoreTakeFromISR(semphr, hptw);
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}
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2016-10-18 13:49:00 +00:00
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static int32_t IRAM_ATTR semphr_give_from_isr_wrapper(void *semphr, void *hptw)
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{
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return (int32_t)xSemaphoreGiveFromISR(semphr, hptw);
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}
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static int32_t IRAM_ATTR semphr_take_wrapper(void *semphr, uint32_t block_time_ms)
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{
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2017-07-11 13:46:17 +00:00
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if (block_time_ms == OSI_FUNCS_TIME_BLOCKING) {
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return (int32_t)xSemaphoreTake(semphr, portMAX_DELAY);
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} else {
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return (int32_t)xSemaphoreTake(semphr, block_time_ms / portTICK_PERIOD_MS);
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}
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}
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static int32_t IRAM_ATTR semphr_give_wrapper(void *semphr)
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{
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return (int32_t)xSemaphoreGive(semphr);
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2016-10-18 13:49:00 +00:00
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}
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2016-11-24 18:10:15 +00:00
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static void *IRAM_ATTR mutex_create_wrapper(void)
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2016-10-18 13:49:00 +00:00
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{
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return (void *)xSemaphoreCreateMutex();
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}
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2017-07-11 13:46:17 +00:00
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static void IRAM_ATTR mutex_delete_wrapper(void *mutex)
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{
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vSemaphoreDelete(mutex);
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}
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2016-10-18 13:49:00 +00:00
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static int32_t IRAM_ATTR mutex_lock_wrapper(void *mutex)
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{
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return (int32_t)xSemaphoreTake(mutex, portMAX_DELAY);
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}
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static int32_t IRAM_ATTR mutex_unlock_wrapper(void *mutex)
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{
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return (int32_t)xSemaphoreGive(mutex);
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}
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2017-07-11 13:46:17 +00:00
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static void *IRAM_ATTR queue_create_wrapper(uint32_t queue_len, uint32_t item_size)
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{
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return (void *)xQueueCreate(queue_len, item_size);
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}
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static void IRAM_ATTR queue_delete_wrapper(void *queue)
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{
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vQueueDelete(queue);
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}
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static int32_t IRAM_ATTR queue_send_wrapper(void *queue, void *item, uint32_t block_time_ms)
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{
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if (block_time_ms == OSI_FUNCS_TIME_BLOCKING) {
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return (int32_t)xQueueSend(queue, item, portMAX_DELAY);
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} else {
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return (int32_t)xQueueSend(queue, item, block_time_ms / portTICK_PERIOD_MS);
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}
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}
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static int32_t IRAM_ATTR queue_send_from_isr_wrapper(void *queue, void *item, void *hptw)
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{
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return (int32_t)xQueueSendFromISR(queue, item, hptw);
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}
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static int32_t IRAM_ATTR queue_recv_wrapper(void *queue, void *item, uint32_t block_time_ms)
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{
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if (block_time_ms == OSI_FUNCS_TIME_BLOCKING) {
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return (int32_t)xQueueReceive(queue, item, portMAX_DELAY);
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} else {
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return (int32_t)xQueueReceive(queue, item, block_time_ms / portTICK_PERIOD_MS);
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}
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}
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static int32_t IRAM_ATTR queue_recv_from_isr_wrapper(void *queue, void *item, void *hptw)
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{
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return (int32_t)xQueueReceiveFromISR(queue, item, hptw);
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}
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static int32_t IRAM_ATTR task_create_wrapper(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id)
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{
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return (uint32_t)xTaskCreatePinnedToCore(task_func, name, stack_depth, param, prio, task_handle, (core_id < portNUM_PROCESSORS ? core_id : tskNO_AFFINITY));
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}
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static void IRAM_ATTR task_delete_wrapper(void *task_handle)
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{
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vTaskDelete(task_handle);
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}
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2017-07-25 11:58:39 +00:00
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static bool IRAM_ATTR is_in_isr_wrapper(void)
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{
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return (bool)xPortInIsrContext();
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}
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2017-10-20 09:09:03 +00:00
|
|
|
static void IRAM_ATTR cause_sw_intr(void *arg)
|
|
|
|
{
|
|
|
|
/* just convert void * to int, because the width is the same */
|
|
|
|
uint32_t intr_no = (uint32_t)arg;
|
|
|
|
XTHAL_SET_INTSET((1<<intr_no));
|
|
|
|
}
|
|
|
|
|
|
|
|
static int IRAM_ATTR cause_sw_intr_to_core_wrapper(int core_id, int intr_no)
|
|
|
|
{
|
|
|
|
esp_err_t err = ESP_OK;
|
|
|
|
|
|
|
|
if (xPortGetCoreID() == core_id) {
|
|
|
|
cause_sw_intr((void *)intr_no);
|
|
|
|
} else {
|
|
|
|
err = esp_ipc_call(core_id, cause_sw_intr, (void *)intr_no);
|
|
|
|
}
|
|
|
|
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
2017-03-01 13:04:12 +00:00
|
|
|
static int32_t IRAM_ATTR read_mac_wrapper(uint8_t mac[6])
|
|
|
|
{
|
|
|
|
return esp_read_mac(mac, ESP_MAC_BT);
|
|
|
|
}
|
|
|
|
|
2017-03-24 06:57:07 +00:00
|
|
|
static void IRAM_ATTR srand_wrapper(unsigned int seed)
|
|
|
|
{
|
|
|
|
/* empty function */
|
|
|
|
}
|
|
|
|
|
|
|
|
static int IRAM_ATTR rand_wrapper(void)
|
|
|
|
{
|
|
|
|
return (int)esp_random();
|
|
|
|
}
|
|
|
|
|
2016-10-18 13:49:00 +00:00
|
|
|
static struct osi_funcs_t osi_funcs = {
|
|
|
|
._set_isr = xt_set_interrupt_handler,
|
|
|
|
._ints_on = xt_ints_on,
|
|
|
|
._interrupt_disable = interrupt_disable,
|
|
|
|
._interrupt_restore = interrupt_restore,
|
|
|
|
._task_yield = vPortYield,
|
2017-06-07 06:58:17 +00:00
|
|
|
._task_yield_from_isr = task_yield_from_isr,
|
2016-10-18 13:49:00 +00:00
|
|
|
._semphr_create = semphr_create_wrapper,
|
2017-07-11 13:46:17 +00:00
|
|
|
._semphr_delete = semphr_delete_wrapper,
|
|
|
|
._semphr_take_from_isr = semphr_take_from_isr_wrapper,
|
2016-10-18 13:49:00 +00:00
|
|
|
._semphr_give_from_isr = semphr_give_from_isr_wrapper,
|
|
|
|
._semphr_take = semphr_take_wrapper,
|
2017-07-11 13:46:17 +00:00
|
|
|
._semphr_give = semphr_give_wrapper,
|
2016-10-18 13:49:00 +00:00
|
|
|
._mutex_create = mutex_create_wrapper,
|
2017-07-11 13:46:17 +00:00
|
|
|
._mutex_delete = mutex_delete_wrapper,
|
2016-10-18 13:49:00 +00:00
|
|
|
._mutex_lock = mutex_lock_wrapper,
|
|
|
|
._mutex_unlock = mutex_unlock_wrapper,
|
2017-07-11 13:46:17 +00:00
|
|
|
._queue_create = queue_create_wrapper,
|
|
|
|
._queue_delete = queue_delete_wrapper,
|
|
|
|
._queue_send = queue_send_wrapper,
|
|
|
|
._queue_send_from_isr = queue_send_from_isr_wrapper,
|
|
|
|
._queue_recv = queue_recv_wrapper,
|
|
|
|
._queue_recv_from_isr = queue_recv_from_isr_wrapper,
|
|
|
|
._task_create = task_create_wrapper,
|
|
|
|
._task_delete = task_delete_wrapper,
|
2017-07-25 11:58:39 +00:00
|
|
|
._is_in_isr = is_in_isr_wrapper,
|
2017-10-20 09:09:03 +00:00
|
|
|
._cause_sw_intr_to_core = cause_sw_intr_to_core_wrapper,
|
2017-07-11 13:46:17 +00:00
|
|
|
._malloc = malloc,
|
|
|
|
._free = free,
|
2017-03-24 06:57:07 +00:00
|
|
|
._read_efuse_mac = read_mac_wrapper,
|
|
|
|
._srand = srand_wrapper,
|
|
|
|
._rand = rand_wrapper,
|
2016-10-18 13:49:00 +00:00
|
|
|
};
|
|
|
|
|
2017-01-03 07:53:06 +00:00
|
|
|
bool esp_vhci_host_check_send_available(void)
|
|
|
|
{
|
|
|
|
return API_vhci_host_check_send_available();
|
|
|
|
}
|
|
|
|
|
|
|
|
void esp_vhci_host_send_packet(uint8_t *data, uint16_t len)
|
|
|
|
{
|
|
|
|
API_vhci_host_send_packet(data, len);
|
|
|
|
}
|
|
|
|
|
|
|
|
void esp_vhci_host_register_callback(const esp_vhci_host_callback_t *callback)
|
|
|
|
{
|
|
|
|
API_vhci_host_register_callback((const vhci_host_callback_t *)callback);
|
|
|
|
}
|
|
|
|
|
2017-02-21 09:46:59 +00:00
|
|
|
static uint32_t btdm_config_mask_load(void)
|
|
|
|
{
|
|
|
|
uint32_t mask = 0x0;
|
|
|
|
|
2017-09-19 12:10:35 +00:00
|
|
|
if (btdm_dram_available_region[0].mode == ESP_BT_MODE_BLE) {
|
|
|
|
mask |= BTDM_CFG_BT_DATA_RELEASE;
|
|
|
|
}
|
|
|
|
|
2017-10-20 09:09:03 +00:00
|
|
|
#if CONFIG_BTDM_CONTROLLER_HCI_MODE_UART_H4
|
2017-03-16 09:14:20 +00:00
|
|
|
mask |= BTDM_CFG_HCI_UART;
|
|
|
|
#endif
|
2017-10-20 09:09:03 +00:00
|
|
|
#if CONFIG_BTDM_CONTROLLER_PINNED_TO_CORE == 1
|
2017-03-16 09:14:20 +00:00
|
|
|
mask |= BTDM_CFG_CONTROLLER_RUN_APP_CPU;
|
2017-02-21 09:46:59 +00:00
|
|
|
#endif
|
|
|
|
return mask;
|
|
|
|
}
|
|
|
|
|
2017-09-19 12:10:35 +00:00
|
|
|
static void btdm_controller_mem_init(void)
|
2017-09-12 14:36:17 +00:00
|
|
|
{
|
2017-09-19 12:10:35 +00:00
|
|
|
/* initialise .bss, .data and .etc section */
|
|
|
|
memcpy(&_data_start_btdm, (void *)_data_start_btdm_rom, &_data_end_btdm - &_data_start_btdm);
|
|
|
|
ESP_LOGD(BTDM_LOG_TAG, ".data initialise [0x%08x] <== [0x%08x]\n", (uint32_t)&_data_start_btdm, _data_start_btdm_rom);
|
|
|
|
|
|
|
|
for (int i = 1; i < sizeof(btdm_dram_available_region)/sizeof(btdm_dram_available_region_t); i++) {
|
|
|
|
if (btdm_dram_available_region[i].mode != ESP_BT_MODE_IDLE) {
|
|
|
|
memset((void *)btdm_dram_available_region[i].start, 0x0, btdm_dram_available_region[i].end - btdm_dram_available_region[i].start);
|
|
|
|
ESP_LOGD(BTDM_LOG_TAG, ".bss initialise [0x%08x] - [0x%08x]\n", btdm_dram_available_region[i].start, btdm_dram_available_region[i].end);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
esp_err_t esp_bt_controller_mem_release(esp_bt_mode_t mode)
|
|
|
|
{
|
|
|
|
bool update = true;
|
|
|
|
intptr_t mem_start, mem_end;
|
|
|
|
|
2017-12-12 07:24:43 +00:00
|
|
|
if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_IDLE) {
|
|
|
|
return ESP_ERR_INVALID_STATE;
|
2017-09-19 12:10:35 +00:00
|
|
|
}
|
|
|
|
|
2018-02-13 06:55:18 +00:00
|
|
|
//already released
|
2017-09-19 12:10:35 +00:00
|
|
|
if (!(mode & btdm_dram_available_region[0].mode)) {
|
|
|
|
return ESP_ERR_INVALID_STATE;
|
|
|
|
}
|
|
|
|
|
|
|
|
for (int i = 0; i < sizeof(btdm_dram_available_region)/sizeof(btdm_dram_available_region_t); i++) {
|
|
|
|
//skip the share mode, idle mode and other mode
|
|
|
|
if (btdm_dram_available_region[i].mode == ESP_BT_MODE_IDLE
|
|
|
|
|| (mode & btdm_dram_available_region[i].mode) != btdm_dram_available_region[i].mode) {
|
|
|
|
//clear the bit of the mode which will be released
|
|
|
|
btdm_dram_available_region[i].mode &= ~mode;
|
|
|
|
continue;
|
|
|
|
} else {
|
|
|
|
//clear the bit of the mode which will be released
|
|
|
|
btdm_dram_available_region[i].mode &= ~mode;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (update) {
|
|
|
|
mem_start = btdm_dram_available_region[i].start;
|
|
|
|
mem_end = btdm_dram_available_region[i].end;
|
|
|
|
update = false;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (i < sizeof(btdm_dram_available_region)/sizeof(btdm_dram_available_region_t) - 1) {
|
|
|
|
mem_end = btdm_dram_available_region[i].end;
|
|
|
|
if (btdm_dram_available_region[i+1].mode != ESP_BT_MODE_IDLE
|
|
|
|
&& (mode & btdm_dram_available_region[i+1].mode) == btdm_dram_available_region[i+1].mode
|
|
|
|
&& mem_end == btdm_dram_available_region[i+1].start) {
|
|
|
|
continue;
|
|
|
|
} else {
|
|
|
|
ESP_LOGD(BTDM_LOG_TAG, "Release DRAM [0x%08x] - [0x%08x]\n", mem_start, mem_end);
|
|
|
|
ESP_ERROR_CHECK( heap_caps_add_region(mem_start, mem_end));
|
|
|
|
update = true;
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
mem_end = btdm_dram_available_region[i].end;
|
|
|
|
ESP_LOGD(BTDM_LOG_TAG, "Release DRAM [0x%08x] - [0x%08x]\n", mem_start, mem_end);
|
|
|
|
ESP_ERROR_CHECK( heap_caps_add_region(mem_start, mem_end));
|
|
|
|
update = true;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return ESP_OK;
|
2017-09-12 14:36:17 +00:00
|
|
|
}
|
|
|
|
|
2017-04-05 13:19:15 +00:00
|
|
|
esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
|
2016-10-18 13:49:00 +00:00
|
|
|
{
|
2017-04-05 13:19:15 +00:00
|
|
|
BaseType_t ret;
|
2017-07-11 13:46:17 +00:00
|
|
|
uint32_t btdm_cfg_mask = 0;
|
2017-04-05 13:19:15 +00:00
|
|
|
|
2017-02-20 17:05:37 +00:00
|
|
|
if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_IDLE) {
|
2017-04-05 13:19:15 +00:00
|
|
|
return ESP_ERR_INVALID_STATE;
|
2017-02-20 17:05:37 +00:00
|
|
|
}
|
|
|
|
|
2017-09-19 12:10:35 +00:00
|
|
|
//if all the bt available memory was already released, cannot initialize bluetooth controller
|
|
|
|
if (btdm_dram_available_region[0].mode == ESP_BT_MODE_IDLE) {
|
|
|
|
return ESP_ERR_INVALID_STATE;
|
|
|
|
}
|
|
|
|
|
2017-04-05 13:19:15 +00:00
|
|
|
if (cfg == NULL) {
|
|
|
|
return ESP_ERR_INVALID_ARG;
|
|
|
|
}
|
|
|
|
|
2017-07-11 13:46:17 +00:00
|
|
|
if (cfg->controller_task_prio != ESP_TASK_BT_CONTROLLER_PRIO
|
|
|
|
|| cfg->controller_task_stack_size < ESP_TASK_BT_CONTROLLER_STACK) {
|
|
|
|
return ESP_ERR_INVALID_ARG;
|
2017-06-13 09:14:50 +00:00
|
|
|
}
|
|
|
|
|
2017-10-09 07:34:31 +00:00
|
|
|
#ifdef CONFIG_PM_ENABLE
|
|
|
|
esp_err_t err = esp_pm_lock_create(ESP_PM_APB_FREQ_MAX, 0, "bt", &s_pm_lock);
|
|
|
|
if (err != ESP_OK) {
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2018-03-27 08:35:00 +00:00
|
|
|
ESP_LOGI(BTDM_LOG_TAG, "BT controller compile version [%s]\n", btdm_controller_get_compile_version());
|
|
|
|
|
2017-07-11 13:46:17 +00:00
|
|
|
btdm_osi_funcs_register(&osi_funcs);
|
2017-04-05 13:19:15 +00:00
|
|
|
|
2017-09-19 12:10:35 +00:00
|
|
|
btdm_controller_mem_init();
|
|
|
|
|
2017-11-01 09:05:38 +00:00
|
|
|
periph_module_enable(PERIPH_BT_MODULE);
|
|
|
|
|
2017-07-11 13:46:17 +00:00
|
|
|
btdm_cfg_mask = btdm_config_mask_load();
|
2017-04-05 13:19:15 +00:00
|
|
|
|
2017-07-11 13:46:17 +00:00
|
|
|
ret = btdm_controller_init(btdm_cfg_mask, cfg);
|
|
|
|
if (ret) {
|
2017-10-09 07:34:31 +00:00
|
|
|
#ifdef CONFIG_PM_ENABLE
|
|
|
|
esp_pm_lock_delete(s_pm_lock);
|
|
|
|
s_pm_lock = NULL;
|
|
|
|
#endif
|
2017-04-05 13:19:15 +00:00
|
|
|
return ESP_ERR_NO_MEM;
|
|
|
|
}
|
|
|
|
|
2017-07-11 13:46:17 +00:00
|
|
|
btdm_controller_status = ESP_BT_CONTROLLER_STATUS_INITED;
|
2017-04-05 13:19:15 +00:00
|
|
|
return ESP_OK;
|
2017-02-17 11:24:58 +00:00
|
|
|
}
|
|
|
|
|
2017-07-11 13:46:17 +00:00
|
|
|
esp_err_t esp_bt_controller_deinit(void)
|
2017-02-17 11:24:58 +00:00
|
|
|
{
|
2017-07-11 13:46:17 +00:00
|
|
|
if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_INITED) {
|
|
|
|
return ESP_ERR_INVALID_STATE;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (btdm_controller_deinit() != 0) {
|
|
|
|
return ESP_ERR_NO_MEM;
|
|
|
|
}
|
|
|
|
|
2017-11-01 09:05:38 +00:00
|
|
|
periph_module_disable(PERIPH_BT_MODULE);
|
|
|
|
|
2017-10-10 07:35:17 +00:00
|
|
|
btdm_controller_status = ESP_BT_CONTROLLER_STATUS_IDLE;
|
2017-10-09 07:34:31 +00:00
|
|
|
|
|
|
|
#ifdef CONFIG_PM_ENABLE
|
|
|
|
esp_pm_lock_delete(s_pm_lock);
|
|
|
|
s_pm_lock = NULL;
|
|
|
|
#endif
|
|
|
|
|
2017-07-11 13:46:17 +00:00
|
|
|
return ESP_OK;
|
2017-02-17 11:24:58 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
esp_err_t esp_bt_controller_enable(esp_bt_mode_t mode)
|
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
|
2017-02-20 17:05:37 +00:00
|
|
|
if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_INITED) {
|
|
|
|
return ESP_ERR_INVALID_STATE;
|
|
|
|
}
|
2017-09-19 12:10:35 +00:00
|
|
|
|
|
|
|
//check the mode is available mode
|
|
|
|
if (mode & ~btdm_dram_available_region[0].mode) {
|
2017-02-17 11:24:58 +00:00
|
|
|
return ESP_ERR_INVALID_ARG;
|
|
|
|
}
|
|
|
|
|
2017-10-09 07:34:31 +00:00
|
|
|
#ifdef CONFIG_PM_ENABLE
|
|
|
|
esp_pm_lock_acquire(s_pm_lock);
|
|
|
|
#endif
|
|
|
|
|
2017-11-10 02:54:50 +00:00
|
|
|
esp_phy_load_cal_and_init(PHY_BT_MODULE);
|
|
|
|
esp_modem_sleep_register(MODEM_BLE_MODULE);
|
|
|
|
|
|
|
|
/* TODO: Classic BT should be registered once it supports
|
|
|
|
* modem sleep */
|
|
|
|
|
|
|
|
esp_modem_sleep_exit(MODEM_BLE_MODULE);
|
2017-02-17 11:24:58 +00:00
|
|
|
|
|
|
|
if (btdm_bb_init_flag == false) {
|
|
|
|
btdm_bb_init_flag = true;
|
|
|
|
btdm_rf_bb_init(); /* only initialise once */
|
|
|
|
}
|
|
|
|
|
|
|
|
ret = btdm_controller_enable(mode);
|
|
|
|
if (ret) {
|
2017-11-10 02:54:50 +00:00
|
|
|
esp_modem_sleep_deregister(MODEM_BLE_MODULE);
|
|
|
|
esp_phy_rf_deinit(PHY_BT_MODULE);
|
2017-02-17 11:24:58 +00:00
|
|
|
return ESP_ERR_INVALID_STATE;
|
|
|
|
}
|
|
|
|
|
2017-02-20 17:05:37 +00:00
|
|
|
btdm_controller_status = ESP_BT_CONTROLLER_STATUS_ENABLED;
|
|
|
|
|
2017-02-17 11:24:58 +00:00
|
|
|
return ESP_OK;
|
|
|
|
}
|
|
|
|
|
2017-09-19 12:10:35 +00:00
|
|
|
esp_err_t esp_bt_controller_disable(void)
|
2017-02-17 11:24:58 +00:00
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
|
2017-02-20 17:05:37 +00:00
|
|
|
if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
|
|
|
|
return ESP_ERR_INVALID_STATE;
|
|
|
|
}
|
|
|
|
|
2017-09-19 12:10:35 +00:00
|
|
|
ret = btdm_controller_disable(btdm_controller_get_mode());
|
2017-07-11 13:46:17 +00:00
|
|
|
if (ret < 0) {
|
2017-02-17 11:24:58 +00:00
|
|
|
return ESP_ERR_INVALID_STATE;
|
|
|
|
}
|
|
|
|
|
2017-07-11 13:46:17 +00:00
|
|
|
if (ret == ESP_BT_MODE_IDLE) {
|
2017-11-10 02:54:50 +00:00
|
|
|
/* TODO: Need to de-register classic BT once it supports
|
|
|
|
* modem sleep */
|
|
|
|
esp_modem_sleep_deregister(MODEM_BLE_MODULE);
|
|
|
|
esp_phy_rf_deinit(PHY_BT_MODULE);
|
2017-07-11 13:46:17 +00:00
|
|
|
btdm_controller_status = ESP_BT_CONTROLLER_STATUS_INITED;
|
|
|
|
}
|
2017-02-20 17:05:37 +00:00
|
|
|
|
2017-10-09 07:34:31 +00:00
|
|
|
#ifdef CONFIG_PM_ENABLE
|
|
|
|
esp_pm_lock_release(s_pm_lock);
|
|
|
|
#endif
|
|
|
|
|
2017-02-17 11:24:58 +00:00
|
|
|
return ESP_OK;
|
2016-10-18 13:49:00 +00:00
|
|
|
}
|
|
|
|
|
2017-02-20 17:05:37 +00:00
|
|
|
esp_bt_controller_status_t esp_bt_controller_get_status(void)
|
|
|
|
{
|
|
|
|
return btdm_controller_status;
|
|
|
|
}
|
|
|
|
|
2017-07-11 13:46:17 +00:00
|
|
|
|
|
|
|
/* extra functions */
|
|
|
|
esp_err_t esp_ble_tx_power_set(esp_ble_power_type_t power_type, esp_power_level_t power_level)
|
|
|
|
{
|
|
|
|
if (ble_txpwr_set(power_type, power_level) != 0) {
|
|
|
|
return ESP_ERR_INVALID_ARG;
|
|
|
|
}
|
|
|
|
|
|
|
|
return ESP_OK;
|
|
|
|
}
|
|
|
|
|
|
|
|
esp_power_level_t esp_ble_tx_power_get(esp_ble_power_type_t power_type)
|
|
|
|
{
|
|
|
|
return (esp_power_level_t)ble_txpwr_get(power_type);
|
|
|
|
}
|
|
|
|
|
2017-09-12 14:36:17 +00:00
|
|
|
#endif /* CONFIG_BT_ENABLED */
|