2016-08-17 15:08:22 +00:00
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/* Default entry point: */
|
2016-09-26 04:29:00 +00:00
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ENTRY(call_start_cpu0);
|
2016-08-17 15:08:22 +00:00
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SECTIONS
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{
|
2016-10-13 00:46:51 +00:00
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/* RTC fast memory holds RTC wake stub code,
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including from any source file named rtc_wake_stub*.c
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*/
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.rtc.text :
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{
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. = ALIGN(4);
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*(.rtc.literal .rtc.text)
|
2018-03-01 06:02:32 +00:00
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*rtc_wake_stub*.*(.literal .text .literal.* .text.*)
|
2018-02-26 17:32:58 +00:00
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} > rtc_iram_seg
|
2016-10-13 00:46:51 +00:00
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/* RTC slow memory holds RTC wake stub
|
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data/rodata, including from any source file
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named rtc_wake_stub*.c
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*/
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.rtc.data :
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{
|
2017-01-11 09:23:23 +00:00
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_rtc_data_start = ABSOLUTE(.);
|
2016-10-13 00:46:51 +00:00
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*(.rtc.data)
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*(.rtc.rodata)
|
2018-03-01 06:02:32 +00:00
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*rtc_wake_stub*.*(.data .rodata .data.* .rodata.* .bss .bss.*)
|
2017-01-11 09:23:23 +00:00
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_rtc_data_end = ABSOLUTE(.);
|
2016-10-13 00:46:51 +00:00
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} > rtc_slow_seg
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/* RTC bss, from any source file named rtc_wake_stub*.c */
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.rtc.bss (NOLOAD) :
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{
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|
_rtc_bss_start = ABSOLUTE(.);
|
2018-03-01 06:02:32 +00:00
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*rtc_wake_stub*.*(.bss .bss.*)
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*rtc_wake_stub*.*(COMMON)
|
2016-10-13 00:46:51 +00:00
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_rtc_bss_end = ABSOLUTE(.);
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} > rtc_slow_seg
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2018-02-26 17:32:58 +00:00
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/* This section holds data that should not be initialized at power up
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and will be retained during deep sleep. The section located in
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RTC SLOW Memory area. User data marked with RTC_NOINIT_ATTR will be placed
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into this section. See the file "esp_attr.h" for more information.
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*/
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.rtc_noinit (NOLOAD):
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{
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. = ALIGN(4);
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|
_rtc_noinit_start = ABSOLUTE(.);
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*(.rtc_noinit .rtc_noinit.*)
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. = ALIGN(4) ;
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_rtc_noinit_end = ABSOLUTE(.);
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} > rtc_slow_seg
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2016-08-17 15:08:22 +00:00
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/* Send .iram0 code to iram */
|
2016-10-13 00:46:51 +00:00
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.iram0.vectors :
|
2016-08-17 15:08:22 +00:00
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|
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{
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|
/* Vectors go to IRAM */
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|
_init_start = ABSOLUTE(.);
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/* Vectors according to builds/RF-2015.2-win32/esp108_v1_2_s5_512int_2/config.html */
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. = 0x0;
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KEEP(*(.WindowVectors.text));
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. = 0x180;
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|
KEEP(*(.Level2InterruptVector.text));
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|
. = 0x1c0;
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|
KEEP(*(.Level3InterruptVector.text));
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|
. = 0x200;
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|
KEEP(*(.Level4InterruptVector.text));
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|
. = 0x240;
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|
KEEP(*(.Level5InterruptVector.text));
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|
. = 0x280;
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|
|
KEEP(*(.DebugExceptionVector.text));
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|
. = 0x2c0;
|
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|
|
KEEP(*(.NMIExceptionVector.text));
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|
. = 0x300;
|
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|
|
KEEP(*(.KernelExceptionVector.text));
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|
. = 0x340;
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|
|
|
KEEP(*(.UserExceptionVector.text));
|
|
|
|
. = 0x3C0;
|
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|
|
KEEP(*(.DoubleExceptionVector.text));
|
|
|
|
. = 0x400;
|
|
|
|
*(.*Vector.literal)
|
|
|
|
|
|
|
|
*(.UserEnter.literal);
|
|
|
|
*(.UserEnter.text);
|
|
|
|
. = ALIGN (16);
|
|
|
|
*(.entry.text)
|
|
|
|
*(.init.literal)
|
|
|
|
*(.init)
|
|
|
|
_init_end = ABSOLUTE(.);
|
2017-03-21 08:29:57 +00:00
|
|
|
|
|
|
|
/* This goes here, not at top of linker script, so addr2line finds it last,
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|
|
|
and uses it in preference to the first symbol in IRAM */
|
|
|
|
_iram_start = ABSOLUTE(0);
|
2016-08-17 15:08:22 +00:00
|
|
|
} > iram0_0_seg
|
|
|
|
|
|
|
|
.iram0.text :
|
|
|
|
{
|
|
|
|
/* Code marked as runnning out of IRAM */
|
|
|
|
_iram_text_start = ABSOLUTE(.);
|
|
|
|
*(.iram1 .iram1.*)
|
|
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|
*libfreertos.a:(.literal .text .literal.* .text.*)
|
2018-03-01 06:02:32 +00:00
|
|
|
*libheap.a:multi_heap.*(.literal .text .literal.* .text.*)
|
|
|
|
*libheap.a:multi_heap_poisoning.*(.literal .text .literal.* .text.*)
|
|
|
|
*libesp32.a:panic.*(.literal .text .literal.* .text.*)
|
|
|
|
*libesp32.a:core_dump.*(.literal .text .literal.* .text.*)
|
2018-12-18 01:36:50 +00:00
|
|
|
INCLUDE wifi_iram.ld
|
2019-12-12 07:04:02 +00:00
|
|
|
INCLUDE wifi_rx_iram.ld
|
2017-03-22 03:07:37 +00:00
|
|
|
*libapp_trace.a:(.literal .text .literal.* .text.*)
|
2018-03-01 06:02:32 +00:00
|
|
|
*libxtensa-debug-module.a:eri.*(.literal .text .literal.* .text.*)
|
2016-08-17 15:08:22 +00:00
|
|
|
*librtc.a:(.literal .text .literal.* .text.*)
|
2017-04-11 07:44:43 +00:00
|
|
|
*libsoc.a:(.literal .text .literal.* .text.*)
|
2016-08-17 15:08:22 +00:00
|
|
|
*libhal.a:(.literal .text .literal.* .text.*)
|
2018-03-01 06:02:32 +00:00
|
|
|
*libgcc.a:lib2funcs.*(.literal .text .literal.* .text.*)
|
|
|
|
*libspi_flash.a:spi_flash_rom_patch.*(.literal .text .literal.* .text.*)
|
2017-08-16 23:36:00 +00:00
|
|
|
*libgcov.a:(.literal .text .literal.* .text.*)
|
2017-09-11 08:59:03 +00:00
|
|
|
INCLUDE esp32.spiram.rom-functions-iram.ld
|
2016-08-17 15:08:22 +00:00
|
|
|
_iram_text_end = ABSOLUTE(.);
|
|
|
|
} > iram0_0_seg
|
2018-02-26 17:32:58 +00:00
|
|
|
|
2017-01-06 05:03:07 +00:00
|
|
|
.dram0.data :
|
|
|
|
{
|
|
|
|
_data_start = ABSOLUTE(.);
|
2017-07-12 05:04:07 +00:00
|
|
|
*(.data)
|
|
|
|
*(.data.*)
|
|
|
|
*(.gnu.linkonce.d.*)
|
|
|
|
*(.data1)
|
|
|
|
*(.sdata)
|
|
|
|
*(.sdata.*)
|
|
|
|
*(.gnu.linkonce.s.*)
|
|
|
|
*(.sdata2)
|
|
|
|
*(.sdata2.*)
|
|
|
|
*(.gnu.linkonce.s2.*)
|
|
|
|
*(.jcr)
|
2017-01-06 05:03:07 +00:00
|
|
|
*(.dram1 .dram1.*)
|
2018-03-01 06:02:32 +00:00
|
|
|
*libesp32.a:panic.*(.rodata .rodata.*)
|
2018-02-02 05:00:11 +00:00
|
|
|
*libphy.a:(.rodata .rodata.*)
|
2018-03-01 06:02:32 +00:00
|
|
|
*libsoc.a:rtc_clk.*(.rodata .rodata.*)
|
2017-03-22 03:07:37 +00:00
|
|
|
*libapp_trace.a:(.rodata .rodata.*)
|
2017-08-16 23:36:00 +00:00
|
|
|
*libgcov.a:(.rodata .rodata.*)
|
2018-03-01 06:02:32 +00:00
|
|
|
*libheap.a:multi_heap.*(.rodata .rodata.*)
|
|
|
|
*libheap.a:multi_heap_poisoning.*(.rodata .rodata.*)
|
2017-09-11 08:59:03 +00:00
|
|
|
INCLUDE esp32.spiram.rom-functions-dram.ld
|
2017-01-06 05:03:07 +00:00
|
|
|
_data_end = ABSOLUTE(.);
|
|
|
|
. = ALIGN(4);
|
2018-02-26 17:32:58 +00:00
|
|
|
} > dram0_0_seg
|
|
|
|
|
|
|
|
/*This section holds data that should not be initialized at power up.
|
|
|
|
The section located in Internal SRAM memory region. The macro _NOINIT
|
|
|
|
can be used as attribute to place data into this section.
|
|
|
|
See the esp_attr.h file for more information.
|
|
|
|
*/
|
|
|
|
.noinit (NOLOAD):
|
|
|
|
{
|
|
|
|
. = ALIGN(4);
|
|
|
|
_noinit_start = ABSOLUTE(.);
|
|
|
|
*(.noinit .noinit.*)
|
|
|
|
. = ALIGN(4) ;
|
|
|
|
_noinit_end = ABSOLUTE(.);
|
|
|
|
} > dram0_0_seg
|
2017-01-06 05:03:07 +00:00
|
|
|
|
2016-08-17 15:08:22 +00:00
|
|
|
/* Shared RAM */
|
|
|
|
.dram0.bss (NOLOAD) :
|
|
|
|
{
|
|
|
|
. = ALIGN (8);
|
|
|
|
_bss_start = ABSOLUTE(.);
|
|
|
|
*(.dynsbss)
|
|
|
|
*(.sbss)
|
|
|
|
*(.sbss.*)
|
|
|
|
*(.gnu.linkonce.sb.*)
|
|
|
|
*(.scommon)
|
|
|
|
*(.sbss2)
|
|
|
|
*(.sbss2.*)
|
|
|
|
*(.gnu.linkonce.sb2.*)
|
|
|
|
*(.dynbss)
|
2016-12-29 23:38:21 +00:00
|
|
|
*(.bss)
|
2016-08-17 15:08:22 +00:00
|
|
|
*(.bss.*)
|
|
|
|
*(.share.mem)
|
|
|
|
*(.gnu.linkonce.b.*)
|
|
|
|
*(COMMON)
|
|
|
|
. = ALIGN (8);
|
|
|
|
_bss_end = ABSOLUTE(.);
|
2018-02-26 17:32:58 +00:00
|
|
|
/* The heap starts right after end of this section */
|
2017-01-06 11:35:22 +00:00
|
|
|
_heap_start = ABSOLUTE(.);
|
2018-02-26 17:32:58 +00:00
|
|
|
} > dram0_0_seg
|
2016-08-17 15:08:22 +00:00
|
|
|
|
|
|
|
.flash.rodata :
|
|
|
|
{
|
|
|
|
_rodata_start = ABSOLUTE(.);
|
|
|
|
*(.rodata)
|
|
|
|
*(.rodata.*)
|
2016-09-12 07:23:15 +00:00
|
|
|
*(.irom1.text) /* catch stray ICACHE_RODATA_ATTR */
|
2016-08-17 15:08:22 +00:00
|
|
|
*(.gnu.linkonce.r.*)
|
|
|
|
*(.rodata1)
|
|
|
|
__XT_EXCEPTION_TABLE_ = ABSOLUTE(.);
|
|
|
|
*(.xt_except_table)
|
2017-06-08 11:34:13 +00:00
|
|
|
*(.gcc_except_table .gcc_except_table.*)
|
2016-08-17 15:08:22 +00:00
|
|
|
*(.gnu.linkonce.e.*)
|
|
|
|
*(.gnu.version_r)
|
|
|
|
. = (. + 3) & ~ 3;
|
2017-06-08 11:34:13 +00:00
|
|
|
__eh_frame = ABSOLUTE(.);
|
|
|
|
KEEP(*(.eh_frame))
|
|
|
|
. = (. + 7) & ~ 3;
|
2016-08-17 15:08:22 +00:00
|
|
|
/* C++ constructor and destructor tables, properly ordered: */
|
|
|
|
__init_array_start = ABSOLUTE(.);
|
2018-03-01 06:02:32 +00:00
|
|
|
KEEP (*crtbegin.*(.ctors))
|
|
|
|
KEEP (*(EXCLUDE_FILE (*crtend.*) .ctors))
|
2016-08-17 15:08:22 +00:00
|
|
|
KEEP (*(SORT(.ctors.*)))
|
|
|
|
KEEP (*(.ctors))
|
|
|
|
__init_array_end = ABSOLUTE(.);
|
2018-03-01 06:02:32 +00:00
|
|
|
KEEP (*crtbegin.*(.dtors))
|
|
|
|
KEEP (*(EXCLUDE_FILE (*crtend.*) .dtors))
|
2016-08-17 15:08:22 +00:00
|
|
|
KEEP (*(SORT(.dtors.*)))
|
|
|
|
KEEP (*(.dtors))
|
|
|
|
/* C++ exception handlers table: */
|
|
|
|
__XT_EXCEPTION_DESCS_ = ABSOLUTE(.);
|
|
|
|
*(.xt_except_desc)
|
|
|
|
*(.gnu.linkonce.h.*)
|
|
|
|
__XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
|
|
|
|
*(.xt_except_desc_end)
|
|
|
|
*(.dynamic)
|
|
|
|
*(.gnu.version_d)
|
|
|
|
_rodata_end = ABSOLUTE(.);
|
2016-09-12 07:23:15 +00:00
|
|
|
/* Literals are also RO data. */
|
2016-08-17 15:08:22 +00:00
|
|
|
_lit4_start = ABSOLUTE(.);
|
|
|
|
*(*.lit4)
|
|
|
|
*(.lit4.*)
|
|
|
|
*(.gnu.linkonce.lit4.*)
|
|
|
|
_lit4_end = ABSOLUTE(.);
|
|
|
|
. = ALIGN(4);
|
2018-02-04 22:06:45 +00:00
|
|
|
_thread_local_start = ABSOLUTE(.);
|
|
|
|
*(.tdata)
|
|
|
|
*(.tdata.*)
|
|
|
|
*(.tbss)
|
|
|
|
*(.tbss.*)
|
|
|
|
_thread_local_end = ABSOLUTE(.);
|
|
|
|
. = ALIGN(4);
|
2016-08-17 15:08:22 +00:00
|
|
|
} >drom0_0_seg
|
|
|
|
|
|
|
|
.flash.text :
|
|
|
|
{
|
|
|
|
_stext = .;
|
|
|
|
_text_start = ABSOLUTE(.);
|
|
|
|
*(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
|
|
|
|
*(.irom0.text) /* catch stray ICACHE_RODATA_ATTR */
|
2018-12-18 01:36:50 +00:00
|
|
|
*(.wifi0iram .wifi0iram.*) /* catch stray WIFI_IRAM_ATTR */
|
2019-12-12 07:04:02 +00:00
|
|
|
*(.wifirxiram .wifirxiram.*) /* catch stray WIFI_RX_IRAM_ATTR */
|
2016-08-17 15:08:22 +00:00
|
|
|
*(.fini.literal)
|
|
|
|
*(.fini)
|
|
|
|
*(.gnu.version)
|
|
|
|
_text_end = ABSOLUTE(.);
|
|
|
|
_etext = .;
|
2017-03-21 08:29:57 +00:00
|
|
|
|
|
|
|
/* Similar to _iram_start, this symbol goes here so it is
|
|
|
|
resolved by addr2line in preference to the first symbol in
|
|
|
|
the flash.text segment.
|
|
|
|
*/
|
|
|
|
_flash_cache_start = ABSOLUTE(0);
|
2016-08-17 15:08:22 +00:00
|
|
|
} >iram0_2_seg
|
|
|
|
}
|