2017-04-24 10:36:47 +00:00
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// Copyright 2015-2017 Espressif Systems (Shanghai) PTE LTD
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2016-10-25 14:12:07 +00:00
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include <errno.h>
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#include <stdlib.h>
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2016-11-02 09:17:28 +00:00
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#include <time.h>
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#include <reent.h>
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2017-08-16 06:58:30 +00:00
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#include <unistd.h>
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2016-10-25 14:12:07 +00:00
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#include <sys/types.h>
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#include <sys/reent.h>
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#include <sys/time.h>
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#include <sys/times.h>
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2016-11-03 04:46:46 +00:00
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#include <sys/lock.h>
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2017-01-11 09:28:09 +00:00
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#include <rom/rtc.h>
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2016-10-25 14:12:07 +00:00
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#include "esp_attr.h"
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2016-11-25 09:33:51 +00:00
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#include "esp_intr_alloc.h"
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2017-04-24 10:36:47 +00:00
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#include "esp_clk.h"
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2016-11-02 09:17:28 +00:00
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#include "soc/soc.h"
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2017-04-24 10:36:47 +00:00
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#include "soc/rtc.h"
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2016-11-02 09:17:28 +00:00
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#include "soc/rtc_cntl_reg.h"
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#include "soc/frc_timer_reg.h"
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#include "rom/ets_sys.h"
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#include "freertos/FreeRTOS.h"
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#include "freertos/xtensa_api.h"
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#include "freertos/task.h"
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#include "sdkconfig.h"
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2016-10-25 14:12:07 +00:00
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2016-11-02 09:17:28 +00:00
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#if defined( CONFIG_ESP32_TIME_SYSCALL_USE_RTC ) || defined( CONFIG_ESP32_TIME_SYSCALL_USE_RTC_FRC1 )
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#define WITH_RTC 1
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#endif
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2016-10-25 14:12:07 +00:00
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2016-11-02 09:17:28 +00:00
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#if defined( CONFIG_ESP32_TIME_SYSCALL_USE_FRC1 ) || defined( CONFIG_ESP32_TIME_SYSCALL_USE_RTC_FRC1 )
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#define WITH_FRC1 1
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#endif
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#ifdef WITH_RTC
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static uint64_t get_rtc_time_us()
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2016-10-25 14:12:07 +00:00
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{
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2017-05-19 03:37:16 +00:00
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const uint64_t ticks = rtc_time_get();
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const uint32_t cal = esp_clk_slowclk_cal_get();
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/* RTC counter result is up to 2^48, calibration factor is up to 2^24,
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* for a 32kHz clock. We need to calculate (assuming no overflow):
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* (ticks * cal) >> RTC_CLK_CAL_FRACT
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*
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* An overflow in the (ticks * cal) multiplication would cause time to
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* wrap around after approximately 13 days, which is probably not enough
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* for some applications.
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* Therefore multiplication is split into two terms, for the lower 32-bit
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* and the upper 16-bit parts of "ticks", i.e.:
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* ((ticks_low + 2^32 * ticks_high) * cal) >> RTC_CLK_CAL_FRACT
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*/
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const uint64_t ticks_low = ticks & UINT32_MAX;
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const uint64_t ticks_high = ticks >> 32;
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return ((ticks_low * cal) >> RTC_CLK_CAL_FRACT) +
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((ticks_high * cal) << (32 - RTC_CLK_CAL_FRACT));
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2016-11-02 09:17:28 +00:00
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}
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#endif // WITH_RTC
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2016-11-04 02:55:25 +00:00
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// s_boot_time: time from Epoch to the first boot time
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2016-11-03 04:46:46 +00:00
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#ifdef WITH_RTC
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2017-01-11 09:28:09 +00:00
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// when RTC is used to persist time, two RTC_STORE registers are used to store boot time
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2016-11-04 02:55:25 +00:00
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#elif defined(WITH_FRC1)
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2017-01-11 09:28:09 +00:00
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static uint64_t s_boot_time;
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2016-11-03 04:46:46 +00:00
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#endif
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2016-11-04 02:55:25 +00:00
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#if defined(WITH_RTC) || defined(WITH_FRC1)
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static _lock_t s_boot_time_lock;
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#endif
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2016-11-03 04:46:46 +00:00
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2016-11-02 09:17:28 +00:00
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#ifdef WITH_FRC1
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#define FRC1_PRESCALER 16
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#define FRC1_PRESCALER_CTL 2
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#define FRC1_TICK_FREQ (APB_CLK_FREQ / FRC1_PRESCALER)
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#define FRC1_TICKS_PER_US (FRC1_TICK_FREQ / 1000000)
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#define FRC1_ISR_PERIOD_US (FRC_TIMER_LOAD_VALUE(0) / FRC1_TICKS_PER_US)
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// Counter frequency will be APB_CLK_FREQ / 16 = 5 MHz
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// 1 tick = 0.2 us
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// Timer has 23 bit counter, so interrupt will fire each 1677721.6 microseconds.
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// This is not a whole number, so timer will drift by 0.3 ppm due to rounding error.
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static volatile uint64_t s_microseconds = 0;
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static void IRAM_ATTR frc_timer_isr()
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{
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2017-01-16 11:52:23 +00:00
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// Write to FRC_TIMER_INT_REG may not take effect in some cases (root cause TBD)
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// This extra write works around this issue.
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2017-01-18 14:49:41 +00:00
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// FRC_TIMER_LOAD_REG(0) is used here, but any other DPORT register address can also be used.
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WRITE_PERI_REG(FRC_TIMER_LOAD_REG(0), FRC_TIMER_LOAD_VALUE(0));
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2016-11-02 09:17:28 +00:00
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WRITE_PERI_REG(FRC_TIMER_INT_REG(0), FRC_TIMER_INT_CLR);
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s_microseconds += FRC1_ISR_PERIOD_US;
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2016-10-25 14:12:07 +00:00
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}
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2016-11-02 09:17:28 +00:00
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#endif // WITH_FRC1
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2017-01-16 11:53:10 +00:00
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#if defined(WITH_RTC) || defined(WITH_FRC1)
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2017-01-11 09:28:09 +00:00
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static void set_boot_time(uint64_t time_us)
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{
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_lock_acquire(&s_boot_time_lock);
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#ifdef WITH_RTC
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REG_WRITE(RTC_BOOT_TIME_LOW_REG, (uint32_t) (time_us & 0xffffffff));
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REG_WRITE(RTC_BOOT_TIME_HIGH_REG, (uint32_t) (time_us >> 32));
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#else
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s_boot_time = time_us;
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#endif
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_lock_release(&s_boot_time_lock);
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}
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static uint64_t get_boot_time()
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{
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uint64_t result;
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_lock_acquire(&s_boot_time_lock);
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#ifdef WITH_RTC
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result = ((uint64_t) REG_READ(RTC_BOOT_TIME_LOW_REG)) + (((uint64_t) REG_READ(RTC_BOOT_TIME_HIGH_REG)) << 32);
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#else
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result = s_boot_time;
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#endif
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_lock_release(&s_boot_time_lock);
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return result;
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}
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2017-01-16 11:53:10 +00:00
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#endif //defined(WITH_RTC) || defined(WITH_FRC1)
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2017-01-11 09:28:09 +00:00
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2017-06-12 11:51:17 +00:00
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void esp_clk_slowclk_cal_set(uint32_t new_cal)
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{
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#if defined(WITH_RTC)
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/* To force monotonic time values even when clock calibration value changes,
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* we adjust boot time, given current time and the new calibration value:
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* T = boot_time_old + cur_cal * ticks / 2^19
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* T = boot_time_adj + new_cal * ticks / 2^19
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* which results in:
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* boot_time_adj = boot_time_old + ticks * (cur_cal - new_cal) / 2^19
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*/
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const int64_t ticks = (int64_t) rtc_time_get();
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const uint32_t cur_cal = REG_READ(RTC_SLOW_CLK_CAL_REG);
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int32_t cal_diff = (int32_t) (cur_cal - new_cal);
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int64_t boot_time_diff = ticks * cal_diff / (1LL << RTC_CLK_CAL_FRACT);
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uint64_t boot_time_adj = get_boot_time() + boot_time_diff;
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set_boot_time(boot_time_adj);
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#endif // WITH_RTC
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REG_WRITE(RTC_SLOW_CLK_CAL_REG, new_cal);
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}
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uint32_t esp_clk_slowclk_cal_get()
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{
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return REG_READ(RTC_SLOW_CLK_CAL_REG);
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}
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2016-11-02 09:17:28 +00:00
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void esp_setup_time_syscalls()
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2016-10-25 14:12:07 +00:00
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{
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2016-11-02 09:17:28 +00:00
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#if defined( WITH_FRC1 )
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#if defined( WITH_RTC )
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// initialize time from RTC clock
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s_microseconds = get_rtc_time_us();
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#endif //WITH_RTC
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// set up timer
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WRITE_PERI_REG(FRC_TIMER_CTRL_REG(0), \
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FRC_TIMER_AUTOLOAD | \
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(FRC1_PRESCALER_CTL << FRC_TIMER_PRESCALER_S) | \
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FRC_TIMER_EDGE_INT);
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WRITE_PERI_REG(FRC_TIMER_LOAD_REG(0), FRC_TIMER_LOAD_VALUE(0));
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SET_PERI_REG_MASK(FRC_TIMER_CTRL_REG(0),
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FRC_TIMER_ENABLE | \
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FRC_TIMER_INT_ENABLE);
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2016-11-25 09:33:51 +00:00
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esp_intr_alloc(ETS_TIMER1_INTR_SOURCE, 0, &frc_timer_isr, NULL, NULL);
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2016-11-02 09:17:28 +00:00
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#endif // WITH_FRC1
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}
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clock_t IRAM_ATTR _times_r(struct _reent *r, struct tms *ptms)
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{
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clock_t t = xTaskGetTickCount() * (portTICK_PERIOD_MS * CLK_TCK / 1000);
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2016-11-08 02:33:21 +00:00
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ptms->tms_cstime = 0;
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2016-11-02 09:17:28 +00:00
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ptms->tms_cutime = 0;
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ptms->tms_stime = t;
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ptms->tms_utime = 0;
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struct timeval tv = {0, 0};
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_gettimeofday_r(r, &tv, NULL);
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return (clock_t) tv.tv_sec;
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}
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2016-11-04 02:55:25 +00:00
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#if defined( WITH_FRC1 ) || defined( WITH_RTC )
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2016-11-03 04:46:46 +00:00
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static uint64_t get_time_since_boot()
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2016-11-02 09:17:28 +00:00
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{
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2016-11-03 04:46:46 +00:00
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uint64_t microseconds = 0;
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2016-11-02 09:17:28 +00:00
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#ifdef WITH_FRC1
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uint32_t timer_ticks_before = READ_PERI_REG(FRC_TIMER_COUNT_REG(0));
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2016-11-03 04:46:46 +00:00
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microseconds = s_microseconds;
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2016-11-02 09:17:28 +00:00
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uint32_t timer_ticks_after = READ_PERI_REG(FRC_TIMER_COUNT_REG(0));
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if (timer_ticks_after > timer_ticks_before) {
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// overflow happened at some point between getting
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// timer_ticks_before and timer_ticks_after
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// microseconds value is ambiguous, get a new one
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microseconds = s_microseconds;
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}
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microseconds += (FRC_TIMER_LOAD_VALUE(0) - timer_ticks_after) / FRC1_TICKS_PER_US;
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#elif defined(WITH_RTC)
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2016-11-03 04:46:46 +00:00
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microseconds = get_rtc_time_us();
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2016-11-02 09:17:28 +00:00
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#endif
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2016-11-03 04:46:46 +00:00
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return microseconds;
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}
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2016-11-04 02:55:25 +00:00
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#endif // defined( WITH_FRC1 ) || defined( WITH_RTC )
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2016-11-02 09:17:28 +00:00
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2016-11-03 04:46:46 +00:00
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int IRAM_ATTR _gettimeofday_r(struct _reent *r, struct timeval *tv, void *tz)
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{
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(void) tz;
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2016-11-02 09:17:28 +00:00
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#if defined( WITH_FRC1 ) || defined( WITH_RTC )
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if (tv) {
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2017-01-11 09:28:09 +00:00
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uint64_t microseconds = get_boot_time() + get_time_since_boot();
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tv->tv_sec = microseconds / 1000000;
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2016-11-02 09:17:28 +00:00
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tv->tv_usec = microseconds % 1000000;
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}
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return 0;
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#else
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2016-10-25 14:12:07 +00:00
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__errno_r(r) = ENOSYS;
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2016-10-27 03:47:41 +00:00
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return -1;
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2016-11-02 09:17:28 +00:00
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#endif // defined( WITH_FRC1 ) || defined( WITH_RTC )
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2016-10-25 14:12:07 +00:00
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}
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2016-11-03 04:46:46 +00:00
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int settimeofday(const struct timeval *tv, const struct timezone *tz)
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{
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(void) tz;
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#if defined( WITH_FRC1 ) || defined( WITH_RTC )
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if (tv) {
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uint64_t now = ((uint64_t) tv->tv_sec) * 1000000LL + tv->tv_usec;
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uint64_t since_boot = get_time_since_boot();
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2017-01-11 09:28:09 +00:00
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set_boot_time(now - since_boot);
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2016-11-03 04:46:46 +00:00
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}
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return 0;
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#else
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2016-11-04 02:55:25 +00:00
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errno = ENOSYS;
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2016-11-03 04:46:46 +00:00
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return -1;
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#endif
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}
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2016-11-21 09:15:37 +00:00
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2017-08-16 06:58:30 +00:00
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int usleep(useconds_t us)
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{
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const int us_per_tick = portTICK_PERIOD_MS * 1000;
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if (us < us_per_tick) {
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ets_delay_us((uint32_t) us);
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} else {
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/* since vTaskDelay(1) blocks for anywhere between 0 and portTICK_PERIOD_MS,
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* round up to compensate.
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*/
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vTaskDelay((us + us_per_tick - 1) / us_per_tick);
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}
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return 0;
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}
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2016-11-21 09:15:37 +00:00
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uint32_t system_get_time(void)
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{
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#if defined( WITH_FRC1 ) || defined( WITH_RTC )
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return get_time_since_boot();
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#else
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return 0;
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#endif
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}
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uint32_t system_get_current_time(void) __attribute__((alias("system_get_time")));
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uint32_t system_relative_time(uint32_t current_time)
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{
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return system_get_time() - current_time;
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}
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uint64_t system_get_rtc_time(void)
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{
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#ifdef WITH_RTC
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return get_rtc_time_us();
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#else
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return 0;
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#endif
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}
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