2017-03-31 07:05:25 +00:00
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/* SPI Slave example, sender (uses SPI master driver)
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This example code is in the Public Domain (or CC0 licensed, at your option.)
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Unless required by applicable law or agreed to in writing, this
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software is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
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CONDITIONS OF ANY KIND, either express or implied.
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*/
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#include <stdio.h>
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#include <stdint.h>
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#include <stddef.h>
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#include <string.h>
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#include "freertos/FreeRTOS.h"
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#include "freertos/task.h"
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#include "freertos/semphr.h"
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#include "freertos/queue.h"
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#include "lwip/sockets.h"
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#include "lwip/dns.h"
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#include "lwip/netdb.h"
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#include "lwip/igmp.h"
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#include "esp_wifi.h"
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#include "esp_system.h"
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#include "esp_event.h"
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#include "nvs_flash.h"
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2019-05-13 10:02:45 +00:00
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#include "soc/rtc_periph.h"
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2017-03-31 07:05:25 +00:00
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#include "driver/spi_master.h"
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#include "esp_log.h"
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#include "esp_spi_flash.h"
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#include "driver/gpio.h"
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#include "esp_intr_alloc.h"
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/*
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SPI sender (master) example.
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2019-06-13 06:21:35 +00:00
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This example is supposed to work together with the SPI receiver. It uses the standard SPI pins (MISO, MOSI, SCLK, CS) to
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2017-03-31 07:05:25 +00:00
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transmit data over in a full-duplex fashion, that is, while the master puts data on the MOSI pin, the slave puts its own
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data on the MISO pin.
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This example uses one extra pin: GPIO_HANDSHAKE is used as a handshake pin. The slave makes this pin high as soon as it is
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2019-06-13 06:21:35 +00:00
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ready to receive/send data. This code connects this line to a GPIO interrupt which gives the rdySem semaphore. The main
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2017-03-31 07:05:25 +00:00
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task waits for this semaphore to be given before queueing a transmission.
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*/
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/*
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Pins in use. The SPI Master can use the GPIO mux, so feel free to change these if needed.
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*/
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#define GPIO_HANDSHAKE 2
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#define GPIO_MOSI 12
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#define GPIO_MISO 13
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#define GPIO_SCLK 15
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#define GPIO_CS 14
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2019-06-13 06:21:35 +00:00
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#ifdef CONFIG_IDF_TARGET_ESP32
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#define SENDER_HOST HSPI_HOST
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#define DMA_CHAN 2
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2020-01-17 03:47:08 +00:00
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#elif defined CONFIG_IDF_TARGET_ESP32S2
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2019-06-13 06:21:35 +00:00
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#define SENDER_HOST SPI2_HOST
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#define DMA_CHAN SENDER_HOST
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#endif
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2017-03-31 07:05:25 +00:00
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//The semaphore indicating the slave is ready to receive stuff.
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static xQueueHandle rdySem;
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/*
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This ISR is called when the handshake line goes high.
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*/
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static void IRAM_ATTR gpio_handshake_isr_handler(void* arg)
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{
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//Sometimes due to interference or ringing or something, we get two irqs after eachother. This is solved by
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//looking at the time between interrupts and refusing any interrupt too close to another one.
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static uint32_t lasthandshaketime;
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uint32_t currtime=xthal_get_ccount();
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uint32_t diff=currtime-lasthandshaketime;
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if (diff<240000) return; //ignore everything <1ms after an earlier irq
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lasthandshaketime=currtime;
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//Give the semaphore.
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BaseType_t mustYield=false;
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xSemaphoreGiveFromISR(rdySem, &mustYield);
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if (mustYield) portYIELD_FROM_ISR();
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}
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//Main application
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2019-07-16 09:33:30 +00:00
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void app_main(void)
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2017-03-31 07:05:25 +00:00
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{
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esp_err_t ret;
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spi_device_handle_t handle;
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//Configuration for the SPI bus
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spi_bus_config_t buscfg={
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.mosi_io_num=GPIO_MOSI,
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.miso_io_num=GPIO_MISO,
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.sclk_io_num=GPIO_SCLK,
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.quadwp_io_num=-1,
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.quadhd_io_num=-1
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};
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//Configuration for the SPI device on the other side of the bus
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spi_device_interface_config_t devcfg={
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.command_bits=0,
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.address_bits=0,
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.dummy_bits=0,
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.clock_speed_hz=5000000,
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.duty_cycle_pos=128, //50% duty cycle
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.mode=0,
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.spics_io_num=GPIO_CS,
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.cs_ena_posttrans=3, //Keep the CS low 3 cycles after transaction, to stop slave from missing the last bit when CS has less propagation delay than CLK
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.queue_size=3
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};
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//GPIO config for the handshake line.
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gpio_config_t io_conf={
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2020-06-19 04:00:58 +00:00
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.intr_type=GPIO_INTR_POSEDGE,
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2017-03-31 07:05:25 +00:00
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.mode=GPIO_MODE_INPUT,
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.pull_up_en=1,
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.pin_bit_mask=(1<<GPIO_HANDSHAKE)
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};
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int n=0;
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2018-08-28 13:34:44 +00:00
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char sendbuf[128] = {0};
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char recvbuf[128] = {0};
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2017-03-31 07:05:25 +00:00
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spi_transaction_t t;
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memset(&t, 0, sizeof(t));
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//Create the semaphore.
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rdySem=xSemaphoreCreateBinary();
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//Set up handshake line interrupt.
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gpio_config(&io_conf);
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gpio_install_isr_service(0);
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2020-06-19 04:00:58 +00:00
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gpio_set_intr_type(GPIO_HANDSHAKE, GPIO_INTR_POSEDGE);
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2017-03-31 07:05:25 +00:00
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gpio_isr_handler_add(GPIO_HANDSHAKE, gpio_handshake_isr_handler, NULL);
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//Initialize the SPI bus and add the device we want to send stuff to.
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2019-06-13 06:21:35 +00:00
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ret=spi_bus_initialize(SENDER_HOST, &buscfg, DMA_CHAN);
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2017-03-31 07:05:25 +00:00
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assert(ret==ESP_OK);
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2019-06-13 06:21:35 +00:00
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ret=spi_bus_add_device(SENDER_HOST, &devcfg, &handle);
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2017-03-31 07:05:25 +00:00
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assert(ret==ESP_OK);
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2019-06-13 06:21:35 +00:00
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//Assume the slave is ready for the first transmission: if the slave started up before us, we will not detect
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2017-03-31 07:05:25 +00:00
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//positive edge on the handshake line.
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xSemaphoreGive(rdySem);
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while(1) {
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2018-08-28 13:34:44 +00:00
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int res = snprintf(sendbuf, sizeof(sendbuf),
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"Sender, transmission no. %04i. Last time, I received: \"%s\"", n, recvbuf);
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if (res >= sizeof(sendbuf)) {
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printf("Data truncated\n");
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}
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t.length=sizeof(sendbuf)*8;
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2017-03-31 07:05:25 +00:00
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t.tx_buffer=sendbuf;
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t.rx_buffer=recvbuf;
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//Wait for slave to be ready for next byte before sending
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2018-08-29 10:40:21 +00:00
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xSemaphoreTake(rdySem, portMAX_DELAY); //Wait until slave is ready
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2017-03-31 07:05:25 +00:00
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ret=spi_device_transmit(handle, &t);
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printf("Received: %s\n", recvbuf);
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n++;
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}
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//Never reached.
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ret=spi_bus_remove_device(handle);
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assert(ret==ESP_OK);
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}
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