2017-03-22 03:07:37 +00:00
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/*********************************************************************
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* SEGGER Microcontroller GmbH & Co. KG *
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* The Embedded Experts *
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**********************************************************************
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* *
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* (c) 2015 - 2017 SEGGER Microcontroller GmbH & Co. KG *
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* *
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* www.segger.com Support: support@segger.com *
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* *
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**********************************************************************
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* *
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* SEGGER SystemView * Real-time application analysis *
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* *
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**********************************************************************
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* *
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* All rights reserved. *
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* *
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* SEGGER strongly recommends to not make any changes *
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* to or modify the source code of this software in order to stay *
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* compatible with the RTT protocol and J-Link. *
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* *
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* Redistribution and use in source and binary forms, with or *
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* without modification, are permitted provided that the following *
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* conditions are met: *
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* *
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* o Redistributions of source code must retain the above copyright *
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* notice, this list of conditions and the following disclaimer. *
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* *
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* o Redistributions in binary form must reproduce the above *
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* copyright notice, this list of conditions and the following *
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* disclaimer in the documentation and/or other materials provided *
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* with the distribution. *
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* *
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* o Neither the name of SEGGER Microcontroller GmbH & Co. KG *
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* nor the names of its contributors may be used to endorse or *
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* promote products derived from this software without specific *
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* prior written permission. *
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* *
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
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* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, *
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* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF *
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE *
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* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR *
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR *
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT *
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* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; *
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
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* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT *
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE *
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* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH *
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* DAMAGE. *
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* *
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**********************************************************************
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* *
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* SystemView version: V2.42 *
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* *
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**********************************************************************
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-------------------------- END-OF-HEADER -----------------------------
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File : SEGGER_SYSVIEW_Config_FreeRTOS.c
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Purpose : Sample setup configuration of SystemView with FreeRTOS.
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Revision: $Rev: 3734 $
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*/
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#include "freertos/FreeRTOS.h"
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#include "SEGGER_SYSVIEW.h"
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#include "rom/ets_sys.h"
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#if CONFIG_FREERTOS_UNICORE == 0
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#include "driver/timer.h"
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#endif
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#include "esp_app_trace.h"
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#include "esp_app_trace_util.h"
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#include "esp_intr_alloc.h"
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extern const SEGGER_SYSVIEW_OS_API SYSVIEW_X_OS_TraceAPI;
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/*********************************************************************
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*
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* Defines, configurable
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*
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**********************************************************************
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*/
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// The application name to be displayed in SystemViewer
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#define SYSVIEW_APP_NAME "FreeRTOS Application"
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// The target device name
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#define SYSVIEW_DEVICE_NAME "ESP32"
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// Frequency of the timestamp.
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#if CONFIG_FREERTOS_UNICORE == 0
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#define SYSVIEW_TIMESTAMP_FREQ (TIMER_BASE_CLK/2)
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#else
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#define SYSVIEW_TIMESTAMP_FREQ (XT_CLOCK_FREQ)
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#endif
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// System Frequency.
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#define SYSVIEW_CPU_FREQ (XT_CLOCK_FREQ)
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// The lowest RAM address used for IDs (pointers)
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#define SYSVIEW_RAM_BASE (0x3F400000)
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#if CONFIG_FREERTOS_CORETIMER_0
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#define SYSTICK_INTR_ID (ETS_INTERNAL_TIMER0_INTR_SOURCE+ETS_INTERNAL_INTR_SOURCE_OFF)
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#endif
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#if CONFIG_FREERTOS_CORETIMER_1
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#define SYSTICK_INTR_ID (ETS_INTERNAL_TIMER1_INTR_SOURCE+ETS_INTERNAL_INTR_SOURCE_OFF)
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#endif
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#if CONFIG_FREERTOS_UNICORE == 0
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static timer_idx_t s_ts_timer_idx;
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static timer_group_t s_ts_timer_group;
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#endif
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// SystemView is single core specific: it implies that SEGGER_SYSVIEW_LOCK()
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// disables IRQs (disables rescheduling globaly). So we can not use finite timeouts for locks and return error
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// in case of expiration, because error will not be handled and SEGGER's code will go further implying that
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// everything is fine, so for multi-core env we have to wait on underlying lock forever
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#define SEGGER_LOCK_WAIT_TMO ESP_APPTRACE_TMO_INFINITE
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static esp_apptrace_lock_t s_sys_view_lock = {.irq_stat = 0, .portmux = portMUX_INITIALIZER_UNLOCKED};
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static const char * const s_isr_names[] = {
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[0] = "WIFI_MAC",
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[1] = "WIFI_NMI",
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[2] = "WIFI_BB",
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[3] = "BT_MAC",
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[4] = "BT_BB",
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[5] = "BT_BB_NMI",
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[6] = "RWBT",
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[7] = "RWBLE",
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[8] = "RWBT_NMI",
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[9] = "RWBLE_NMI",
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[10] = "SLC0",
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[11] = "SLC1",
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[12] = "UHCI0",
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[13] = "UHCI1",
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[14] = "TG0_T0_LEVEL",
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[15] = "TG0_T1_LEVEL",
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[16] = "TG0_WDT_LEVEL",
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[17] = "TG0_LACT_LEVEL",
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[18] = "TG1_T0_LEVEL",
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[19] = "TG1_T1_LEVEL",
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[20] = "TG1_WDT_LEVEL",
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[21] = "TG1_LACT_LEVEL",
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[22] = "GPIO",
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[23] = "GPIO_NMI",
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[24] = "FROM_CPU0",
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[25] = "FROM_CPU1",
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[26] = "FROM_CPU2",
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[27] = "FROM_CPU3",
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[28] = "SPI0",
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[29] = "SPI1",
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[30] = "SPI2",
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[31] = "SPI3",
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[32] = "I2S0",
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[33] = "I2S1",
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[34] = "UART0",
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[35] = "UART1",
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[36] = "UART2",
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[37] = "SDIO_HOST",
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[38] = "ETH_MAC",
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[39] = "PWM0",
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[40] = "PWM1",
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[41] = "PWM2",
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[42] = "PWM3",
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[43] = "LEDC",
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[44] = "EFUSE",
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[45] = "CAN",
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[46] = "RTC_CORE",
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[47] = "RMT",
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[48] = "PCNT",
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[49] = "I2C_EXT0",
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[50] = "I2C_EXT1",
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[51] = "RSA",
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[52] = "SPI1_DMA",
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[53] = "SPI2_DMA",
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[54] = "SPI3_DMA",
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[55] = "WDT",
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[56] = "TIMER1",
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[57] = "TIMER2",
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[58] = "TG0_T0_EDGE",
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[59] = "TG0_T1_EDGE",
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[60] = "TG0_WDT_EDGE",
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[61] = "TG0_LACT_EDGE",
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[62] = "TG1_T0_EDGE",
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[63] = "TG1_T1_EDGE",
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[64] = "TG1_WDT_EDGE",
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[65] = "TG1_LACT_EDGE",
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[66] = "MMU_IA",
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[67] = "MPU_IA",
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[68] = "CACHE_IA",
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};
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/*********************************************************************
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*
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* _cbSendSystemDesc()
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*
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* Function description
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* Sends SystemView description strings.
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*/
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static void _cbSendSystemDesc(void) {
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char irq_str[32];
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SEGGER_SYSVIEW_SendSysDesc("N="SYSVIEW_APP_NAME",D="SYSVIEW_DEVICE_NAME",C=Xtensa,O=FreeRTOS");
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snprintf(irq_str, sizeof(irq_str), "I#%d=SysTick", SYSTICK_INTR_ID);
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SEGGER_SYSVIEW_SendSysDesc(irq_str);
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size_t isr_count = sizeof(s_isr_names)/sizeof(s_isr_names[0]);
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for (size_t i = 0; i < isr_count; ++i) {
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snprintf(irq_str, sizeof(irq_str), "I#%d=%s", ETS_INTERNAL_INTR_SOURCE_OFF + i, s_isr_names[i]);
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SEGGER_SYSVIEW_SendSysDesc(irq_str);
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}
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}
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/*********************************************************************
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*
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* Global functions
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*
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**********************************************************************
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*/
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#if CONFIG_FREERTOS_UNICORE == 0
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static void SEGGER_SYSVIEW_TS_Init()
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{
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timer_config_t config;
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#if CONFIG_SYSVIEW_TS_SOURCE_TIMER_00
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s_ts_timer_group = TIMER_GROUP_0;
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s_ts_timer_idx = TIMER_0;
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#endif
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#if CONFIG_SYSVIEW_TS_SOURCE_TIMER_01
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s_ts_timer_group = TIMER_GROUP_0;
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s_ts_timer_idx = TIMER_1;
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#endif
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#if CONFIG_SYSVIEW_TS_SOURCE_TIMER_10
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s_ts_timer_group = TIMER_GROUP_1;
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s_ts_timer_idx = TIMER_0;
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#endif
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#if CONFIG_SYSVIEW_TS_SOURCE_TIMER_11
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s_ts_timer_group = TIMER_GROUP_1;
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s_ts_timer_idx = TIMER_1;
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#endif
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config.alarm_en = 0;
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config.auto_reload = 0;
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config.counter_dir = TIMER_COUNT_UP;
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config.divider = 2;
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config.counter_en = 0;
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/*Configure timer*/
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timer_init(s_ts_timer_group, s_ts_timer_idx, &config);
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/*Load counter value */
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timer_set_counter_value(s_ts_timer_group, s_ts_timer_idx, 0x00000000ULL);
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/*Enable timer interrupt*/
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timer_start(s_ts_timer_group, s_ts_timer_idx);
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}
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#endif
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void SEGGER_SYSVIEW_Conf(void) {
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U32 disable_evts = 0;
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#if CONFIG_FREERTOS_UNICORE == 0
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SEGGER_SYSVIEW_TS_Init();
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#endif
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SEGGER_SYSVIEW_Init(SYSVIEW_TIMESTAMP_FREQ, SYSVIEW_CPU_FREQ,
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&SYSVIEW_X_OS_TraceAPI, _cbSendSystemDesc);
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SEGGER_SYSVIEW_SetRAMBase(SYSVIEW_RAM_BASE);
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#if !CONFIG_SYSVIEW_EVT_OVERFLOW_ENABLE
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disable_evts |= SYSVIEW_EVTMASK_OVERFLOW;
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#endif
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#if !CONFIG_SYSVIEW_EVT_ISR_ENTER_ENABLE
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disable_evts |= SYSVIEW_EVTMASK_ISR_ENTER;
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#endif
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#if !CONFIG_SYSVIEW_EVT_ISR_EXIT_ENABLE
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disable_evts |= SYSVIEW_EVTMASK_ISR_EXIT;
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#endif
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#if !CONFIG_SYSVIEW_EVT_TASK_START_EXEC_ENABLE
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disable_evts |= SYSVIEW_EVTMASK_TASK_START_EXEC;
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#endif
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#if !CONFIG_SYSVIEW_EVT_TASK_STOP_EXEC_ENABLE
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disable_evts |= SYSVIEW_EVTMASK_TASK_STOP_EXEC;
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#endif
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#if !CONFIG_SYSVIEW_EVT_TASK_START_READY_ENABLE
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disable_evts |= SYSVIEW_EVTMASK_TASK_START_READY;
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#endif
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#if !CONFIG_SYSVIEW_EVT_TASK_STOP_READY_ENABLE
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disable_evts |= SYSVIEW_EVTMASK_TASK_STOP_READY;
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#endif
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#if !CONFIG_SYSVIEW_EVT_TASK_CREATE_ENABLE
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disable_evts |= SYSVIEW_EVTMASK_TASK_CREATE;
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#endif
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#if !CONFIG_SYSVIEW_EVT_TASK_TERMINATE_ENABLE
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disable_evts |= SYSVIEW_EVTMASK_TASK_TERMINATE;
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#endif
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#if !CONFIG_SYSVIEW_EVT_IDLE_ENABLE
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disable_evts |= SYSVIEW_EVTMASK_IDLE;
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#endif
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#if !CONFIG_SYSVIEW_EVT_ISR_TO_SCHEDULER_ENABLE
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disable_evts |= SYSVIEW_EVTMASK_ISR_TO_SCHEDULER;
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#endif
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#if !CONFIG_SYSVIEW_EVT_TIMER_ENTER_ENABLE
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disable_evts |= SYSVIEW_EVTMASK_TIMER_ENTER;
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#endif
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#if !CONFIG_SYSVIEW_EVT_TIMER_EXIT_ENABLE
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disable_evts |= SYSVIEW_EVTMASK_TIMER_EXIT;
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#endif
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SEGGER_SYSVIEW_DisableEvents(disable_evts);
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}
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U32 SEGGER_SYSVIEW_X_GetTimestamp()
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{
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#if CONFIG_FREERTOS_UNICORE == 0
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uint64_t ts = 0;
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timer_get_counter_value(s_ts_timer_group, s_ts_timer_idx, &ts);
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return (U32)ts; // return lower part of counter value
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#else
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return portGET_RUN_TIME_COUNTER_VALUE();
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#endif
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}
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void SEGGER_SYSVIEW_X_RTT_Lock()
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{
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}
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void SEGGER_SYSVIEW_X_RTT_Unlock()
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{
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}
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void SEGGER_SYSVIEW_X_SysView_Lock()
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{
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2017-07-24 16:57:44 +00:00
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esp_apptrace_tmo_t tmo;
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esp_apptrace_tmo_init(&tmo, SEGGER_LOCK_WAIT_TMO);
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esp_apptrace_lock_take(&s_sys_view_lock, &tmo);
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2017-03-22 03:07:37 +00:00
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}
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void SEGGER_SYSVIEW_X_SysView_Unlock()
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{
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esp_apptrace_lock_give(&s_sys_view_lock);
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}
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/*************************** End of file ****************************/
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