2017-08-07 04:23:58 +00:00
|
|
|
/* Application Trace to Host Example
|
|
|
|
|
|
|
|
This example code is in the Public Domain (or CC0 licensed, at your option.)
|
|
|
|
|
|
|
|
Unless required by applicable law or agreed to in writing, this
|
|
|
|
software is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
|
|
|
|
CONDITIONS OF ANY KIND, either express or implied.
|
|
|
|
*/
|
|
|
|
|
|
|
|
#include <stdio.h>
|
|
|
|
#include "freertos/FreeRTOS.h"
|
|
|
|
#include "freertos/task.h"
|
|
|
|
#include "esp_app_trace.h"
|
2019-01-24 04:43:06 +00:00
|
|
|
#include "esp_log.h"
|
2019-05-13 10:02:45 +00:00
|
|
|
#include "soc/rtc_periph.h"
|
|
|
|
#include "soc/sens_periph.h"
|
2019-01-24 04:43:06 +00:00
|
|
|
#include "driver/adc.h"
|
2017-08-07 04:23:58 +00:00
|
|
|
#include "driver/dac.h"
|
|
|
|
|
|
|
|
#define ADC1_TEST_CHANNEL (ADC1_CHANNEL_6)
|
|
|
|
#define TEST_SAMPLING_PERIOD 20
|
|
|
|
|
|
|
|
/*
|
|
|
|
* When setting custom divider of RTC 8 MHz clock in menuconfig,
|
|
|
|
* use the following values to set the CW frequency:
|
|
|
|
* ~ 50 Hz (entered below)
|
|
|
|
* RTC_CLK_8M_DIV 7
|
|
|
|
* CW_FREQUENCY_STEP 3
|
|
|
|
* ~ 60 Hz
|
|
|
|
* RTC_CLK_8M_DIV 1
|
|
|
|
* CW_FREQUENCY_STEP 1
|
|
|
|
*/
|
|
|
|
#ifdef CONFIG_CUSTOM_RTC_CLK_8M_DIV
|
|
|
|
#define RTC_CLK_8M_DIV 7
|
|
|
|
#define CW_FREQUENCY_STEP 3
|
|
|
|
#else
|
|
|
|
#define CW_FREQUENCY_STEP 1
|
|
|
|
#endif
|
|
|
|
|
|
|
|
static const char *TAG = "example";
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Enable cosine waveform generator (CW)
|
|
|
|
* on channel 1 / GPIO25 to provide sinusoidal signal
|
|
|
|
* It can be used instead of a live signal for testing
|
|
|
|
* of speed of logging to the host
|
|
|
|
* sequentially with data retrieval from ADC
|
|
|
|
*/
|
2019-01-24 04:43:06 +00:00
|
|
|
static void enable_cosine_generator(void)
|
2017-08-07 04:23:58 +00:00
|
|
|
{
|
|
|
|
// Enable tone generator common to both DAC channels 1 and 2
|
|
|
|
SET_PERI_REG_MASK(SENS_SAR_DAC_CTRL1_REG, SENS_SW_TONE_EN);
|
|
|
|
// Enable / connect tone tone generator on / to channel 1
|
|
|
|
SET_PERI_REG_MASK(SENS_SAR_DAC_CTRL2_REG, SENS_DAC_CW_EN1_M);
|
|
|
|
// Invert MSB, otherwise part of the waveform will be inverted
|
|
|
|
SET_PERI_REG_BITS(SENS_SAR_DAC_CTRL2_REG, SENS_DAC_INV1, 2, SENS_DAC_INV1_S);
|
|
|
|
// Set the frequency of waveform on CW output
|
|
|
|
#ifdef CONFIG_CUSTOM_RTC_CLK_8M_DIV
|
|
|
|
REG_SET_FIELD(RTC_CNTL_CLK_CONF_REG, RTC_CNTL_CK8M_DIV_SEL, RTC_CLK_8M_DIV);
|
|
|
|
ESP_LOGI(TAG, "Custom divider of RTC 8 MHz clock has been set.");
|
|
|
|
#endif
|
|
|
|
SET_PERI_REG_BITS(SENS_SAR_DAC_CTRL1_REG, SENS_SW_FSTEP, CW_FREQUENCY_STEP, SENS_SW_FSTEP_S);
|
|
|
|
|
|
|
|
dac_output_enable(DAC_CHANNEL_1);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Sample data an ADC1 channel 6 / GPIO34
|
|
|
|
* over specific 'sampling_period' in milliseconds.
|
|
|
|
* Print out sampling result using standard ESP_LOGI() function.
|
|
|
|
* Return the number of samples collected.
|
|
|
|
*/
|
2019-01-24 04:43:06 +00:00
|
|
|
static int adc1_sample_and_show(int sampling_period)
|
2017-08-07 04:23:58 +00:00
|
|
|
{
|
|
|
|
int i = 0;
|
2019-01-24 04:43:06 +00:00
|
|
|
uint32_t sampling_start = esp_log_timestamp();
|
2017-08-07 04:23:58 +00:00
|
|
|
do {
|
2017-08-07 13:33:01 +00:00
|
|
|
ESP_LOGI(TAG, "Sample:%d, Value:%d", ++i, adc1_get_raw(ADC1_TEST_CHANNEL));
|
2017-08-07 04:23:58 +00:00
|
|
|
} while (esp_log_timestamp() - sampling_start < sampling_period);
|
|
|
|
return i;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Main program loop that is sampling data on ADC
|
|
|
|
* and logging results with application tracing to the host
|
|
|
|
* as well as for comparison printing out sampling result to UART
|
|
|
|
*/
|
2019-07-16 09:33:30 +00:00
|
|
|
void app_main(void)
|
2017-08-07 04:23:58 +00:00
|
|
|
{
|
|
|
|
ESP_LOGI(TAG, "Enabling ADC1 on channel 6 / GPIO34.");
|
2017-08-23 15:12:56 +00:00
|
|
|
adc1_config_width(ADC_WIDTH_BIT_12);
|
|
|
|
adc1_config_channel_atten(ADC1_TEST_CHANNEL, ADC_ATTEN_DB_11);
|
2017-08-07 04:23:58 +00:00
|
|
|
|
|
|
|
ESP_LOGI(TAG, "Enabling CW generator on DAC channel 1 / GPIO25.");
|
|
|
|
enable_cosine_generator();
|
|
|
|
|
|
|
|
while (1) {
|
|
|
|
/*
|
2019-01-24 04:43:06 +00:00
|
|
|
* Logging with the Application Trace
|
2017-08-07 04:23:58 +00:00
|
|
|
*/
|
|
|
|
ESP_LOGI(TAG, "Sampling ADC and sending data to the host...");
|
|
|
|
// Route LOGx() to the host
|
|
|
|
esp_log_set_vprintf(esp_apptrace_vprintf);
|
|
|
|
int samples_collected = adc1_sample_and_show(TEST_SAMPLING_PERIOD);
|
|
|
|
// Route LOGx() back to UART
|
|
|
|
esp_log_set_vprintf(vprintf);
|
|
|
|
// Flush collected data to the host
|
|
|
|
esp_apptrace_flush(ESP_APPTRACE_DEST_TRAX, 100000);
|
|
|
|
ESP_LOGI(TAG, "Collected %d samples in %d ms.\n", samples_collected, TEST_SAMPLING_PERIOD);
|
|
|
|
|
|
|
|
/*
|
2019-01-24 04:43:06 +00:00
|
|
|
* Logging to UART
|
2017-08-07 04:23:58 +00:00
|
|
|
*/
|
|
|
|
ESP_LOGI(TAG, "Sampling ADC and sending data to the UART...");
|
|
|
|
samples_collected = adc1_sample_and_show(TEST_SAMPLING_PERIOD);
|
|
|
|
ESP_LOGI(TAG, "Collected %d samples in %d ms.\n", samples_collected, TEST_SAMPLING_PERIOD);
|
|
|
|
|
|
|
|
vTaskDelay(2000 / portTICK_PERIOD_MS);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|