2018-05-29 08:33:24 +00:00
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/* SDIO example, host (uses sdmmc host driver)
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This example code is in the Public Domain (or CC0 licensed, at your option.)
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Unless required by applicable law or agreed to in writing, this
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software is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
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CONDITIONS OF ANY KIND, either express or implied.
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*/
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#include <stdio.h>
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#include <stdint.h>
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#include <stddef.h>
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#include <string.h>
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#include "freertos/FreeRTOS.h"
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#include "freertos/task.h"
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#include "freertos/semphr.h"
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#include "freertos/queue.h"
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#include "soc/sdmmc_periph.h"
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2019-05-13 10:02:45 +00:00
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#include "soc/sdio_slave_periph.h"
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2018-05-29 08:33:24 +00:00
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#include "esp_log.h"
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#include "esp_attr.h"
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#include "esp_slave.h"
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2018-07-12 07:57:32 +00:00
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#include "sdkconfig.h"
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2018-08-23 12:43:07 +00:00
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#include "driver/sdmmc_host.h"
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#include "driver/sdspi_host.h"
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2018-05-29 08:33:24 +00:00
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2019-07-12 05:20:04 +00:00
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2018-05-29 08:33:24 +00:00
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/*
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* For SDIO master-slave board, we have 3 pins controlling power of 3 different
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* slaves individially. We only enable one at a time.
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*/
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#define GPIO_B1 5
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#define GPIO_B2 18
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#define GPIO_B3 19
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2018-08-23 12:43:07 +00:00
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2018-05-29 08:33:24 +00:00
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#if CONFIG_EXAMPLE_SLAVE_B1
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#define SLAVE_PWR_GPIO GPIO_B1
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#elif CONFIG_EXAMPLE_SLAVE_B2
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#define SLAVE_PWR_GPIO GPIO_B2
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#elif CONFIG_EXAMPLE_SLAVE_B3
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#define SLAVE_PWR_GPIO GPIO_B3
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#endif
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/*
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sdio host example.
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This example is supposed to work together with the sdio slave example. It uses the pins as follows:
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* Host Slave
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* IO14 CLK
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* IO15 CMD
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* IO2 D0
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* IO4 D1
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* IO12 D2
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* IO13 D3
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This is the only pins that can be used in standard ESP modules. The other set of pins (6, 11, 7, 8, 9, 10)
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are occupied by the spi bus communicating with the flash.
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Protocol Above the ESP slave service:
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- Interrupts:
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0 is used to notify the slave to read the register 0.
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- Registers:
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- 0 is the register to hold tasks. Bits:
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- 0: the slave should reset.
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- 1: the slave should send interrupts.
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- 2: the slave should write the shared registers acoording to the value in register 1.
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- 1 is the register to hold test value.
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- other registers will be written by the slave for testing.
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- FIFO:
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The receving FIFO is size of 256 bytes.
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When the host writes something to slave recv FIFO, the slave should return it as is to the sending FIFO.
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The example works as following process:
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1. reset the slave.
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2. tell the slave to write registers and read them back.
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3. tell the slave to send interrupts to the host.
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4. send data to slave FIFO and read them back.
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5. loop step 4.
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*/
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#define WRITE_BUFFER_LEN 4096
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2018-08-23 12:43:07 +00:00
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#define READ_BUFFER_LEN 4096
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2018-05-29 08:33:24 +00:00
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static const char TAG[] = "example_host";
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#define SDIO_INTERRUPT_LINE GPIO_NUM_4 //DATA1
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#define SLAVE_INTR_NOTIFY 0
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#define SLAVE_REG_JOB 0
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#define SLAVE_REG_VALUE 1
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typedef enum {
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JOB_IDLE = 0,
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JOB_RESET = 1,
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JOB_SEND_INT = 2,
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JOB_WRITE_REG = 4,
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} example_job_t;
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//host use this to inform the slave it should reset its counters
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esp_err_t slave_reset(esp_slave_context_t *context)
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{
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esp_err_t ret;
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ESP_LOGI(TAG, "send reset to slave...");
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ret = esp_slave_write_reg(context, 0, JOB_RESET, NULL);
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if (ret != ESP_OK) {
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return ret;
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}
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ret = esp_slave_send_slave_intr(context, BIT(SLAVE_INTR_NOTIFY));
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if (ret != ESP_OK) {
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return ret;
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}
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vTaskDelay(500 / portTICK_RATE_MS);
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ret = esp_slave_wait_for_ioready(context);
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ESP_LOGI(TAG, "slave io ready");
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return ret;
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}
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2019-05-09 14:43:06 +00:00
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#ifdef CONFIG_EXAMPLE_SDIO_OVER_SPI
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2019-07-16 09:33:30 +00:00
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static void gpio_d2_set_high(void)
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2018-08-23 12:43:07 +00:00
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{
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gpio_config_t d2_config = {
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2019-11-18 12:42:22 +00:00
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.pin_bit_mask = BIT64(SDIO_SLAVE_SLOT1_IOMUX_PIN_NUM_D2),
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2018-08-23 12:43:07 +00:00
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.mode = GPIO_MODE_OUTPUT,
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.pull_up_en = true,
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};
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gpio_config(&d2_config);
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gpio_set_level(SDIO_SLAVE_SLOT1_IOMUX_PIN_NUM_D2, 1);
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}
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#endif
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2019-07-12 05:20:04 +00:00
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static esp_err_t print_sdio_cis_information(sdmmc_card_t* card)
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{
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const size_t cis_buffer_size = 256;
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uint8_t cis_buffer[cis_buffer_size];
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size_t cis_data_len = 1024; //specify maximum searching range to avoid infinite loop
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esp_err_t ret = ESP_OK;
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ret = sdmmc_io_get_cis_data(card, cis_buffer, cis_buffer_size, &cis_data_len);
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if (ret == ESP_ERR_INVALID_SIZE) {
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int temp_buf_size = cis_data_len;
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uint8_t* temp_buf = malloc(temp_buf_size);
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assert(temp_buf);
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ESP_LOGW(TAG, "CIS data longer than expected, temporary buffer allocated.");
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ret = sdmmc_io_get_cis_data(card, temp_buf, temp_buf_size, &cis_data_len);
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ESP_ERROR_CHECK(ret);
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sdmmc_io_print_cis_info(temp_buf, cis_data_len, NULL);
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free(temp_buf);
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} else if (ret == ESP_OK) {
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sdmmc_io_print_cis_info(cis_buffer, cis_data_len, NULL);
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} else {
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//including ESP_ERR_NOT_FOUND
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ESP_LOGE(TAG, "failed to get the entire CIS data.");
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abort();
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}
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return ESP_OK;
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}
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2018-05-29 08:33:24 +00:00
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//host use this to initialize the slave card as well as SDIO registers
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esp_err_t slave_init(esp_slave_context_t *context)
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{
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2018-08-23 12:43:07 +00:00
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esp_err_t err;
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2018-05-29 08:33:24 +00:00
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/* Probe */
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2019-05-09 14:43:06 +00:00
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#ifndef CONFIG_EXAMPLE_SDIO_OVER_SPI
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2018-05-29 08:33:24 +00:00
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sdmmc_host_t config = SDMMC_HOST_DEFAULT();
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2019-05-09 14:43:06 +00:00
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#ifdef CONFIG_EXAMPLE_SDIO_4BIT
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2018-08-23 12:43:07 +00:00
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ESP_LOGI(TAG, "Probe using SD 4-bit...\n");
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2018-05-29 08:33:24 +00:00
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config.flags = SDMMC_HOST_FLAG_4BIT;
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#else
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2018-08-23 12:43:07 +00:00
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ESP_LOGI(TAG, "Probe using SD 1-bit...\n");
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2018-05-29 08:33:24 +00:00
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config.flags = SDMMC_HOST_FLAG_1BIT;
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#endif
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2019-05-09 14:43:06 +00:00
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#ifdef CONFIG_EXAMPLE_SDIO_HIGHSPEED
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2018-05-29 08:33:24 +00:00
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config.max_freq_khz = SDMMC_FREQ_HIGHSPEED;
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#else
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2018-07-04 12:37:30 +00:00
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config.max_freq_khz = SDMMC_FREQ_DEFAULT;
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2018-05-29 08:33:24 +00:00
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#endif
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sdmmc_slot_config_t slot_config = SDMMC_SLOT_CONFIG_DEFAULT();
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/* Note: For small devkits there may be no pullups on the board.
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This enables the internal pullups to help evaluate the driver quickly.
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However the internal pullups are not sufficient and not reliable,
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please make sure external pullups are connected to the bus in your
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real design.
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*/
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//slot_config.flags = SDMMC_SLOT_FLAG_INTERNAL_PULLUP;
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2018-08-23 12:43:07 +00:00
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err = sdmmc_host_init();
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2019-07-12 05:20:04 +00:00
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ESP_ERROR_CHECK(err);
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2018-08-23 12:43:07 +00:00
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err = sdmmc_host_init_slot(SDMMC_HOST_SLOT_1, &slot_config);
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2019-07-12 05:20:04 +00:00
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ESP_ERROR_CHECK(err);
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2018-08-23 12:43:07 +00:00
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#else //over SPI
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sdmmc_host_t config = SDSPI_HOST_DEFAULT();
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sdspi_slot_config_t slot_config = SDSPI_SLOT_CONFIG_DEFAULT();
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slot_config.gpio_miso = SDIO_SLAVE_SLOT1_IOMUX_PIN_NUM_D0;
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slot_config.gpio_mosi = SDIO_SLAVE_SLOT1_IOMUX_PIN_NUM_CMD;
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slot_config.gpio_sck = SDIO_SLAVE_SLOT1_IOMUX_PIN_NUM_CLK;
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slot_config.gpio_cs = SDIO_SLAVE_SLOT1_IOMUX_PIN_NUM_D3;
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slot_config.gpio_int = SDIO_SLAVE_SLOT1_IOMUX_PIN_NUM_D1;
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err = gpio_install_isr_service(0);
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2019-07-12 05:20:04 +00:00
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ESP_ERROR_CHECK(err);
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2018-08-23 12:43:07 +00:00
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err = sdspi_host_init();
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2019-07-12 05:20:04 +00:00
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ESP_ERROR_CHECK(err);
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2018-08-23 12:43:07 +00:00
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err = sdspi_host_init_slot(HSPI_HOST, &slot_config);
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2019-07-12 05:20:04 +00:00
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ESP_ERROR_CHECK(err);
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2018-08-23 12:43:07 +00:00
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ESP_LOGI(TAG, "Probe using SPI...\n");
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//we have to pull up all the slave pins even when the pin is not used
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gpio_d2_set_high();
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#endif //over SPI
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2018-05-29 08:33:24 +00:00
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sdmmc_card_t *card = (sdmmc_card_t *)malloc(sizeof(sdmmc_card_t));
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if (card == NULL) {
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return ESP_ERR_NO_MEM;
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}
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for (;;) {
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if (sdmmc_card_init(&config, card) == ESP_OK) {
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break;
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}
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ESP_LOGW(TAG, "slave init failed, retry...");
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vTaskDelay(1000 / portTICK_PERIOD_MS);
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}
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sdmmc_card_print_info(stdout, card);
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gpio_pullup_en(14);
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gpio_pulldown_dis(14);
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gpio_pullup_en(15);
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gpio_pulldown_dis(15);
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gpio_pullup_en(2);
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gpio_pulldown_dis(2);
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gpio_pullup_en(4);
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gpio_pulldown_dis(4);
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gpio_pullup_en(12);
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gpio_pulldown_dis(12);
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gpio_pullup_en(13);
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gpio_pulldown_dis(13);
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*context = ESP_SLAVE_DEFAULT_CONTEXT(card);
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esp_err_t ret = esp_slave_init_io(context);
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2019-07-12 05:20:04 +00:00
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ESP_ERROR_CHECK(ret);
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2018-05-29 08:33:24 +00:00
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2019-07-12 05:20:04 +00:00
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ret = print_sdio_cis_information(card);
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ESP_ERROR_CHECK(ret);
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2018-05-29 08:33:24 +00:00
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return ret;
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}
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2019-07-12 05:20:04 +00:00
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2019-07-16 09:33:30 +00:00
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void slave_power_on(void)
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2018-05-29 08:33:24 +00:00
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{
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#ifdef SLAVE_PWR_GPIO
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2018-08-23 12:43:07 +00:00
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int level_active;
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#ifdef CONFIG_EXAMPLE_SLAVE_PWR_NEGTIVE_ACTIVE
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level_active = 0;
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#else
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level_active = 1;
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#endif
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2018-05-29 08:33:24 +00:00
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gpio_config_t cfg = {
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2019-11-18 12:42:22 +00:00
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.pin_bit_mask = BIT64(GPIO_B1) | BIT64(GPIO_B2) | BIT64(GPIO_B3),
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2018-05-29 08:33:24 +00:00
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.mode = GPIO_MODE_DEF_OUTPUT,
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.pull_up_en = false,
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.pull_down_en = false,
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.intr_type = GPIO_INTR_DISABLE,
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};
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gpio_config(&cfg);
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2018-08-23 12:43:07 +00:00
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gpio_set_level(GPIO_B1, !level_active);
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gpio_set_level(GPIO_B2, !level_active);
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gpio_set_level(GPIO_B3, !level_active);
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2018-07-04 12:37:30 +00:00
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vTaskDelay(100);
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2018-08-23 12:43:07 +00:00
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gpio_set_level(SLAVE_PWR_GPIO, level_active);
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vTaskDelay(100);
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2018-05-29 08:33:24 +00:00
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#endif
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}
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2018-07-04 12:37:30 +00:00
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DMA_ATTR uint8_t rcv_buffer[READ_BUFFER_LEN];
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2018-05-29 08:33:24 +00:00
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//try to get an interrupt from the slave and handle it, return if none.
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esp_err_t process_event(esp_slave_context_t *context)
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{
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esp_err_t ret = esp_slave_wait_int(context, 0);
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if (ret == ESP_ERR_TIMEOUT) {
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return ret;
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}
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ESP_ERROR_CHECK(ret);
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uint32_t intr_raw, intr_st;
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ret = esp_slave_get_intr(context, &intr_raw, &intr_st);
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ESP_ERROR_CHECK(ret);
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ret = esp_slave_clear_intr(context, intr_raw);
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ESP_ERROR_CHECK(ret);
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ESP_LOGD(TAG, "intr: %08X", intr_raw);
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for (int i = 0; i < 8; i++) {
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if (intr_raw & BIT(i)) {
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ESP_LOGI(TAG, "host int: %d", i);
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}
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}
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const int wait_ms = 50;
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if (intr_raw & HOST_SLC0_RX_NEW_PACKET_INT_ST) {
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ESP_LOGD(TAG, "new packet coming");
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|
|
while (1) {
|
|
|
|
size_t size_read = READ_BUFFER_LEN;
|
2018-07-04 12:37:30 +00:00
|
|
|
ret = esp_slave_get_packet(context, rcv_buffer, READ_BUFFER_LEN, &size_read, wait_ms);
|
2018-05-29 08:33:24 +00:00
|
|
|
if (ret == ESP_ERR_NOT_FOUND) {
|
|
|
|
ESP_LOGE(TAG, "interrupt but no data can be read");
|
|
|
|
break;
|
|
|
|
} else if (ret != ESP_OK && ret != ESP_ERR_NOT_FINISHED) {
|
|
|
|
ESP_LOGE(TAG, "rx packet error: %08X", ret);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
ESP_LOGI(TAG, "receive data, size: %d", size_read);
|
2018-07-04 12:37:30 +00:00
|
|
|
ESP_LOG_BUFFER_HEXDUMP(TAG, rcv_buffer, size_read, ESP_LOG_INFO);
|
2018-05-29 08:33:24 +00:00
|
|
|
if (ret == ESP_OK) {
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return ESP_OK;
|
|
|
|
}
|
|
|
|
|
|
|
|
//tell the slave to do a job
|
|
|
|
static inline esp_err_t slave_inform_job(esp_slave_context_t *context, example_job_t job)
|
|
|
|
{
|
|
|
|
esp_err_t ret;
|
|
|
|
ret = esp_slave_write_reg(context, SLAVE_REG_JOB, job, NULL);
|
|
|
|
ESP_ERROR_CHECK(ret);
|
|
|
|
ret = esp_slave_send_slave_intr(context, BIT(SLAVE_INTR_NOTIFY));
|
|
|
|
ESP_ERROR_CHECK(ret);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
//tell the slave to write registers by write one of them, and read them back
|
|
|
|
void job_write_reg(esp_slave_context_t *context, int value)
|
|
|
|
{
|
|
|
|
esp_err_t ret;
|
|
|
|
uint8_t reg_read[64];
|
|
|
|
ESP_LOGI(TAG, "========JOB: write slave reg========");
|
|
|
|
ret = esp_slave_write_reg(context, SLAVE_REG_VALUE, value, NULL);
|
|
|
|
ESP_ERROR_CHECK(ret);
|
|
|
|
|
|
|
|
ret = slave_inform_job(context, JOB_WRITE_REG);
|
|
|
|
ESP_ERROR_CHECK(ret);
|
|
|
|
|
|
|
|
vTaskDelay(10);
|
|
|
|
for (int i = 0; i < 64; i++) {
|
|
|
|
ESP_LOGD(TAG, "reading register %d", i);
|
|
|
|
ret = esp_slave_read_reg(context, i, ®_read[i]);
|
|
|
|
ESP_ERROR_CHECK(ret);
|
|
|
|
}
|
|
|
|
|
|
|
|
ESP_LOGI(TAG, "read registers:");
|
|
|
|
ESP_LOG_BUFFER_HEXDUMP(TAG, reg_read, 64, ESP_LOG_INFO);
|
|
|
|
}
|
|
|
|
|
2018-08-23 12:43:07 +00:00
|
|
|
//the slave only load 16 buffers a time
|
|
|
|
//so first 5 packets (use 1+1+8+4+1=15 buffers) are sent, the others (513, 517) failed (timeout)
|
|
|
|
int packet_len[] = {6, 12, 1024, 512, 3, 513, 517};
|
2018-05-29 08:33:24 +00:00
|
|
|
//the sending buffer should be word aligned
|
2018-07-04 12:37:30 +00:00
|
|
|
DMA_ATTR uint8_t send_buffer[READ_BUFFER_LEN];
|
2018-05-29 08:33:24 +00:00
|
|
|
|
|
|
|
//send packets to the slave (they will return and be handled by the interrupt handler)
|
|
|
|
void job_fifo(esp_slave_context_t *context)
|
|
|
|
{
|
2018-08-23 12:43:07 +00:00
|
|
|
for (int i = 0; i < READ_BUFFER_LEN; i++) {
|
2018-07-04 12:37:30 +00:00
|
|
|
send_buffer[i] = 0x46 + i * 5;
|
2018-05-29 08:33:24 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
esp_err_t ret;
|
|
|
|
int pointer = 0;
|
|
|
|
|
|
|
|
ESP_LOGI(TAG, "========JOB: send fifos========");
|
|
|
|
/* CAUTION: This example shows that we can send random length of packet to the slave.
|
|
|
|
* However it takes time of two transactions if the length is not multiples of 4 bytes.
|
|
|
|
* e.g. sending 6 bytes is done by sending 4 + 2 bytes each transaction.
|
|
|
|
* Try to avoid unaligned packets if possible to get higher effeciency.
|
|
|
|
*/
|
|
|
|
for (int i = 0; i < sizeof(packet_len) / sizeof(int); i++) {
|
|
|
|
const int wait_ms = 50;
|
|
|
|
int length = packet_len[i];
|
2018-07-04 12:37:30 +00:00
|
|
|
ret = esp_slave_send_packet(context, send_buffer + pointer, length, wait_ms);
|
2018-05-29 08:33:24 +00:00
|
|
|
if (ret == ESP_ERR_TIMEOUT) {
|
|
|
|
ESP_LOGD(TAG, "several packets are expected to timeout.");
|
|
|
|
} else {
|
|
|
|
ESP_ERROR_CHECK(ret);
|
|
|
|
ESP_LOGI(TAG, "send packet length: %d", length);
|
|
|
|
}
|
|
|
|
pointer += (length + 3) & (~3); //the length can be random, but data should start at the 32-bit boundary.
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
//inform the slave to send interrupts to host (the interrupts will be handled in the interrupt handler)
|
|
|
|
void job_getint(esp_slave_context_t *context)
|
|
|
|
{
|
|
|
|
ESP_LOGI(TAG, "========JOB: get interrupts from slave========");
|
|
|
|
slave_inform_job(context, JOB_SEND_INT);
|
|
|
|
}
|
|
|
|
|
2019-07-16 09:33:30 +00:00
|
|
|
void app_main(void)
|
2018-05-29 08:33:24 +00:00
|
|
|
{
|
|
|
|
esp_slave_context_t context;
|
|
|
|
esp_err_t err;
|
|
|
|
|
|
|
|
//enable the power if on espressif SDIO master-slave board
|
|
|
|
slave_power_on();
|
|
|
|
|
|
|
|
ESP_LOGI(TAG, "host ready, start initializing slave...");
|
|
|
|
|
|
|
|
err = slave_init(&context);
|
|
|
|
ESP_ERROR_CHECK(err);
|
|
|
|
|
|
|
|
err = slave_reset(&context);
|
|
|
|
ESP_ERROR_CHECK(err);
|
|
|
|
|
|
|
|
uint32_t start, end;
|
|
|
|
|
|
|
|
job_write_reg(&context, 10);
|
|
|
|
|
|
|
|
int times = 2;
|
|
|
|
|
|
|
|
while (1) {
|
|
|
|
job_getint(&context);
|
|
|
|
start = xTaskGetTickCount();
|
|
|
|
while (1) {
|
|
|
|
process_event(&context);
|
|
|
|
vTaskDelay(1);
|
|
|
|
end = xTaskGetTickCount();
|
|
|
|
if ((end - start) * 1000 / CONFIG_FREERTOS_HZ > 5000) {
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
if (--times == 0) {
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
};
|
|
|
|
|
|
|
|
while (1) {
|
|
|
|
job_fifo(&context);
|
|
|
|
|
|
|
|
start = xTaskGetTickCount();
|
|
|
|
while (1) {
|
|
|
|
process_event(&context);
|
|
|
|
vTaskDelay(1);
|
|
|
|
end = xTaskGetTickCount();
|
|
|
|
if ((end - start) * 1000 / CONFIG_FREERTOS_HZ > 2000) {
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|