2018-05-29 08:33:24 +00:00
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/* SDIO example, slave (uses sdio slave driver)
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This example code is in the Public Domain (or CC0 licensed, at your option.)
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Unless required by applicable law or agreed to in writing, this
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software is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
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CONDITIONS OF ANY KIND, either express or implied.
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*/
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#include "driver/sdio_slave.h"
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#include "esp_log.h"
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#include "rom/lldesc.h"
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#include "rom/queue.h"
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#include "soc/soc.h"
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#include "soc/sdio_slave_periph.h"
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#include "freertos/task.h"
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#include "freertos/ringbuf.h"
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2018-07-12 07:57:32 +00:00
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#include "sdkconfig.h"
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2018-05-29 08:33:24 +00:00
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/*
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sdio slave example.
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This example is supposed to work together with the sdio host example. It uses the pins as follows:
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* Host Slave
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* IO14 CLK
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* IO15 CMD
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* IO2 D0
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* IO4 D1
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* IO12 D2
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* IO13 D3
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2018-07-12 07:57:32 +00:00
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This is the only pins that can be used in standard ESP modules. The other set of pins (6, 11, 7, 8, 9, 10)
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2018-05-29 08:33:24 +00:00
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are occupied by the spi bus communicating with the flash.
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2018-07-12 07:57:32 +00:00
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2018-05-29 08:33:24 +00:00
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Protocol Above the ESP slave service:
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- Interrupts:
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0 is used to notify the slave to read the register 0.
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- Registers:
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- 0 is the register to hold tasks. Bits:
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- 0: the slave should reset.
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- 1: the slave should send interrupts.
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- 2: the slave should write the shared registers acoording to the value in register 1.
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- 1 is the register to hold test value.
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- other registers will be written by the slave for testing.
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- FIFO:
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The receving FIFO is size of 256 bytes.
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When the host writes something to slave recv FIFO, the slave should return it as is to the sending FIFO.
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The host works as following process:
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2018-07-12 07:57:32 +00:00
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2018-05-29 08:33:24 +00:00
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1. reset the slave.
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2. tell the slave to write registers and read them back.
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3. tell the slave to send interrupts to the host.
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4. send data to slave FIFO and read them back.
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5. loop step 4.
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*/
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#define SDIO_SLAVE_QUEUE_SIZE 11
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#define BUFFER_SIZE 128
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#define BUFFER_NUM 12
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#define EV_STR(s) "================ "s" ================"
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typedef enum {
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JOB_IDLE = 0,
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JOB_RESET = 1,
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JOB_SEND_INT = 2,
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JOB_WRITE_REG = 4,
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} example_job_t;
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static const char TAG[] = "example_slave";
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static int s_job = JOB_IDLE;
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DMA_ATTR uint8_t data_to_send[BUFFER_SIZE] = {0x97, 0x84, 0x43, 0x67, 0xc1, 0xdd, 0xff, 0x01, 0x02, 0x03, 0x04, 0x05, 0xff, 0xee, 0xdd, 0xcc, 0xbb, 0xaa, 0x99, 0x88, 0x77, 0x56, 0x55, 0x44, 0x33 ,0x22, 0x11, 0x00 };
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DMA_ATTR uint8_t data_to_recv[BUFFER_SIZE] = {0x97, 0x84, 0x43, 0x67, 0xc1, 0xdd, 0xff, 0x01, 0x02, 0x03, 0x04, 0x05, 0xff, 0xee, 0xdd, 0xcc, 0xbb, 0xaa, 0x99, 0x88, 0x77, 0x56, 0x55, 0x44, 0x33 ,0x22, 0x11, 0x00 };
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static const char job_desc[][32] = {
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"JOB_IDLE",
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"JOB_RESET",
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"JOB_SEND_INT",
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"JOB_WRITE_REG",
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};
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//reset counters of the slave hardware, and clean the receive buffer (normally they should be sent back to the host)
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static esp_err_t slave_reset()
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{
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esp_err_t ret;
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sdio_slave_stop();
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ret = sdio_slave_reset();
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if (ret != ESP_OK) return ret;
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ret = sdio_slave_start();
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if (ret != ESP_OK) return ret;
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//Since the buffer will not be sent any more, we return them back to receving driver
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while(1) {
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sdio_slave_buf_handle_t handle;
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ret = sdio_slave_send_get_finished(&handle, 0);
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if (ret != ESP_OK) break;
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ret = sdio_slave_recv_load_buf(handle);
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ESP_ERROR_CHECK(ret);
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}
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return ESP_OK;
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}
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//sent interrupts to the host in turns
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static esp_err_t task_hostint()
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{
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for(int i = 0; i < 8; i++) {
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ESP_LOGV(TAG, "send intr: %d", i);
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sdio_slave_send_host_int(i);
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//check reset for quick response to RESET signal
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if (s_job & JOB_RESET) break;
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vTaskDelay(500/portTICK_RATE_MS);
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}
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return ESP_OK;
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}
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//read the value in a specified register set by the host, and set other register according to this.
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//the host will read these registers later
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static esp_err_t task_write_reg()
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{
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//the host write REG1, the slave should write its registers according to value of REG1
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uint8_t read = sdio_slave_read_reg(1);
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for (int i = 0; i < 64; i++) {
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//skip interrupt regs.
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if (i >= 28 && i <= 31) continue;
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sdio_slave_write_reg(i, read+3*i);
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}
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2018-08-31 10:59:37 +00:00
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uint8_t reg[64] = {0};
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2018-05-29 08:33:24 +00:00
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for (int i = 0; i < 64; i++) {
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//skip interrupt regs.
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if (i >= 28 && i <= 31) continue;
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reg[i] = sdio_slave_read_reg(i);
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}
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ESP_LOGI(TAG, "write regs:");
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ESP_LOG_BUFFER_HEXDUMP(TAG, reg, 64, ESP_LOG_INFO);
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return ESP_OK;
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}
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//we use the event callback (in ISR) in this example to get higer responding speed
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//note you can't do delay in the ISR
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//``sdio_slave_wait_int`` is another way to handle interrupts
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static void event_cb(uint8_t pos)
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{
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ESP_EARLY_LOGD(TAG, "event: %d", pos);
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switch(pos) {
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case 0:
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s_job = sdio_slave_read_reg(0);
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sdio_slave_write_reg(0, JOB_IDLE);
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break;
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}
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}
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DMA_ATTR uint8_t buffer[BUFFER_NUM][BUFFER_SIZE] = {};
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//Main application
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void app_main()
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{
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esp_err_t ret;
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2018-07-12 07:57:32 +00:00
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2018-05-29 08:33:24 +00:00
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sdio_slave_config_t config = {
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.sending_mode = SDIO_SLAVE_SEND_PACKET,
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.send_queue_size = SDIO_SLAVE_QUEUE_SIZE,
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.recv_buffer_size = BUFFER_SIZE,
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.event_cb = event_cb,
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/* Note: For small devkits there may be no pullups on the board.
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This enables the internal pullups to help evaluate the driver
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quickly. However the internal pullups are not sufficient and not
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reliable, please make sure external pullups are connected to the
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bus in your real design.
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*/
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//.flags = SDIO_SLAVE_FLAG_INTERNAL_PULLUP,
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};
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#ifdef CONFIG_SDIO_DAT2_DISABLED
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/* For slave chips with 3.3V flash, DAT2 pullup conflicts with the pulldown
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required by strapping pin (MTDI). We can either burn the EFUSE for the
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strapping or just disable the DAT2 and work in 1-bit mode.
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*/
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config.flags |= SDIO_SLAVE_FLAG_DAT2_DISABLED;
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#endif
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ret = sdio_slave_initialize(&config);
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ESP_ERROR_CHECK(ret);
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sdio_slave_write_reg(0, JOB_IDLE);
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sdio_slave_buf_handle_t handle;
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for(int i = 0; i < BUFFER_NUM; i++) {
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handle = sdio_slave_recv_register_buf(buffer[i]);
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assert(handle != NULL);
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ret = sdio_slave_recv_load_buf(handle);
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ESP_ERROR_CHECK(ret);
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}
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sdio_slave_set_host_intena(SDIO_SLAVE_HOSTINT_SEND_NEW_PACKET |
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SDIO_SLAVE_HOSTINT_BIT0 |
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SDIO_SLAVE_HOSTINT_BIT1 |
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SDIO_SLAVE_HOSTINT_BIT2 |
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SDIO_SLAVE_HOSTINT_BIT3 |
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SDIO_SLAVE_HOSTINT_BIT4 |
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SDIO_SLAVE_HOSTINT_BIT5 |
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SDIO_SLAVE_HOSTINT_BIT6 |
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SDIO_SLAVE_HOSTINT_BIT7
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);
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sdio_slave_start();
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ESP_LOGI(TAG, EV_STR("slave ready"));
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2018-07-12 07:57:32 +00:00
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2018-05-29 08:33:24 +00:00
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for(;;) {
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//receive data and send back to host.
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size_t length;
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uint8_t *ptr;
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const TickType_t non_blocking = 0;
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ret = sdio_slave_recv(&handle, &ptr, &length, non_blocking);
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if (ret == ESP_OK) {
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ESP_LOGI(TAG, "handle: %p, recv len: %d, data:", handle, length);
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ESP_LOG_BUFFER_HEXDUMP(TAG, ptr, length, ESP_LOG_INFO);
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/* If buffer is no longer used, call sdio_slave_recv_load_buf to return it here. Since we wants to show how
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* to share large buffers between drivers here (we share between sending and receiving), keep the buffer
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* until the buffer is sent by sending driver.
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*/
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//send the received buffer to host, with the handle as the argument
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ret = sdio_slave_send_queue(ptr, length, handle, non_blocking);
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if (ret == ESP_ERR_TIMEOUT) {
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// send failed, direct return the buffer to rx
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ESP_LOGE(TAG, "send_queue full, discard received.");
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ret = sdio_slave_recv_load_buf(handle);
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}
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ESP_ERROR_CHECK(ret);
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}
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// if there's finished sending desc, return the buffer to receiving driver
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for(;;){
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sdio_slave_buf_handle_t handle;
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ret = sdio_slave_send_get_finished(&handle, 0);
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if (ret == ESP_ERR_TIMEOUT) break;
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ESP_ERROR_CHECK(ret);
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ret = sdio_slave_recv_load_buf(handle);
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ESP_ERROR_CHECK(ret);
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}
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if (s_job != 0) {
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for(int i = 0; i < 8; i++) {
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if (s_job & BIT(i)) {
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ESP_LOGI(TAG, EV_STR("%s"), job_desc[i+1]);
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s_job &= ~BIT(i);
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switch(BIT(i)) {
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case JOB_SEND_INT:
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ret = task_hostint();
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ESP_ERROR_CHECK(ret);
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break;
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case JOB_RESET:
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ret = slave_reset();
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ESP_ERROR_CHECK(ret);
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break;
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case JOB_WRITE_REG:
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ret = task_write_reg();
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ESP_ERROR_CHECK(ret);
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break;
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}
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}
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}
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}
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vTaskDelay(1);
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}
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}
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