added datac14 to modem..

This commit is contained in:
DJ2LS 2024-03-29 14:39:55 +01:00
parent ef1fcfe107
commit aacc09f936
6 changed files with 13 additions and 8 deletions

View file

@ -114,7 +114,7 @@ class ARQSessionIRS(arq_session.ARQSession):
self.dxcall,
self.version,
self.snr, flag_abort=self.abort)
self.launch_transmit_and_wait(ack_frame, self.TIMEOUT_CONNECT, mode=FREEDV_MODE.signalling)
self.launch_transmit_and_wait(ack_frame, self.TIMEOUT_CONNECT, mode=FREEDV_MODE.signalling_ack)
if not self.abort:
self.set_state(IRS_State.OPEN_ACK_SENT)
return None, None
@ -172,10 +172,10 @@ class ARQSessionIRS(arq_session.ARQSession):
self.calibrate_speed_settings(burst_frame=burst_frame)
ack = self.frame_factory.build_arq_burst_ack(
self.id,
self.received_bytes,
#self.received_bytes,
self.speed_level,
self.frames_per_burst,
self.snr,
#self.frames_per_burst,
#self.snr,
flag_abort=self.abort
)

View file

@ -25,11 +25,13 @@ class FREEDV_MODE(Enum):
Enumeration for codec2 modes and names
"""
signalling = 19
signalling_ack = 20
datac0 = 14
datac1 = 10
datac3 = 12
datac4 = 18
datac13 = 19
datac14 = 20
class FREEDV_MODE_USED_SLOTS(Enum):
@ -43,6 +45,7 @@ class FREEDV_MODE_USED_SLOTS(Enum):
datac3 = [False, False, True, False, False]
datac4 = [False, False, True, False, False]
datac13 = [False, False, True, False, False]
datac14 = [False, False, True, False, False]
fsk_ldpc = [False, False, True, False, False]
fsk_ldpc_0 = [False, False, True, False, False]
fsk_ldpc_1 = [False, False, True, False, False]

View file

@ -6,6 +6,7 @@ class DataFrameFactory:
LENGTH_SIG0_FRAME = 14
LENGTH_SIG1_FRAME = 14
LENGTH_ACK_FRAME = 3
"""
helpers.set_flag(byte, 'DATA-ACK-NACK', True, FLAG_POSITIONS)
@ -154,7 +155,7 @@ class DataFrameFactory:
# arq burst ack
self.template_list[FR_TYPE.ARQ_BURST_ACK.value] = {
"frame_length": self.LENGTH_SIG1_FRAME,
"frame_length": self.LENGTH_ACK_FRAME,
"session_id": 1,
#"offset":4,
"speed_level": 1,
@ -475,8 +476,7 @@ class DataFrameFactory:
FR_TYPE.ARQ_BURST_FRAME, payload, self.get_bytes_per_frame(freedv_mode)
)
def build_arq_burst_ack(self, session_id: bytes, offset, speed_level: int,
frames_per_burst: int, snr: int, flag_final=False, flag_checksum=False, flag_abort=False):
def build_arq_burst_ack(self, session_id: bytes, speed_level: int, flag_final=False, flag_checksum=False, flag_abort=False):
flag = 0b00000000
if flag_final:
flag = helpers.set_flag(flag, 'FINAL', True, self.ARQ_FLAGS)

View file

@ -344,6 +344,7 @@ class Demodulator():
# signalling is always true
self.MODE_DICT[codec2.FREEDV_MODE.signalling.value]["decode"] = True
self.MODE_DICT[codec2.FREEDV_MODE.signalling_ack.value]["decode"] = True
# lowest speed level is alwys true
self.MODE_DICT[codec2.FREEDV_MODE.datac4.value]["decode"] = True

View file

@ -325,4 +325,3 @@ class RF:
audiobuffer.push(audio_8k_level_adjusted)
except Exception as e:
self.log.warning("[AUDIO EXCEPTION]", status=status, time=time, frames=frames, e=e)

View file

@ -23,6 +23,7 @@ class Modulator:
self.freedv_datac3_tx = codec2.open_instance(codec2.FREEDV_MODE.datac3.value)
self.freedv_datac4_tx = codec2.open_instance(codec2.FREEDV_MODE.datac4.value)
self.freedv_datac13_tx = codec2.open_instance(codec2.FREEDV_MODE.datac13.value)
self.freedv_datac14_tx = codec2.open_instance(codec2.FREEDV_MODE.datac14.value)
def transmit_add_preamble(self, buffer, freedv):
# Init buffer for preample
@ -113,6 +114,7 @@ class Modulator:
codec2.FREEDV_MODE.datac3: self.freedv_datac3_tx,
codec2.FREEDV_MODE.datac4: self.freedv_datac4_tx,
codec2.FREEDV_MODE.datac13: self.freedv_datac13_tx,
codec2.FREEDV_MODE.datac14: self.freedv_datac14_tx
}
if mode in mode_transition:
freedv = mode_transition[mode]